Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 003923/0247 | |
| Pages: | 1 |
| | Recorded: | 09/14/1981 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST. |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1987
|
Application #:
|
06301761
|
Filing Dt:
|
09/14/1981
|
|
Title:
|
CIRCUIT DESIGN TECHNIQUE TO PREVENT CURRENT HOGGING WHEN MINIMIZING INTERCONNECT STRIPES BY PARALLELING STL OR ISL GATE INPUTS
|
|
|
Assignee
|
|
|
|
|
| A CORP. OF DE. |
| MELBOURNE, FLORIDA 32919 |
|
|
Correspondence name and address
|
| |
LEITNER, PALAN, MARTIN
|
| |
& BERNSTEIN
|
| |
1101 30TH STREET, N.W., STE. 305
|
| |
WASHINGTON, DC 20007
|
Search Results as of:
05/05/2024 02:56 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
