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Patent Assignment Details
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Reel/Frame:004001/0899   Pages: 1
Recorded: 06/18/1982
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST.
Total properties: 1
1
Patent #:
Issue Dt:
08/31/1982
Application #:
06152024
Filing Dt:
05/21/1980
Title:
METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE UTILIZING SELECTIVE ETCHING AND EPITAXIAL REFILL
Assignors
1
Exec Dt:
04/14/1982
2
Exec Dt:
04/14/1982
Assignees
1
KAWAUCHI, SENDA-SHI
MIYAGI, JAPAN
2
31-1, KAMEIDO 6-CHOME, KOTO-KU
TOKYO, JAPAN
Correspondence name and address
BURNS, LOBATO & ADAMS
71 BROADWAY SUITE 1230
NEW YORK, NY 10006

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