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Patent Assignment Details
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Reel/Frame:005560/0653   Pages: 4
Recorded: 12/20/1990
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST.
Total properties: 1
1
Patent #:
Issue Dt:
03/09/1993
Application #:
07632281
Filing Dt:
12/20/1990
Title:
INTEGRATED PARITY-BASED TESTING FOR INTEGRATED CIRCUITS
Assignors
1
Exec Dt:
11/29/1990
2
Exec Dt:
12/20/1990
3
Exec Dt:
11/29/1990
4
Exec Dt:
12/11/1990
Assignee
1
1109 MCKAY DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
BRADLEY A. PERKINS
VLSI TECHNOLOGY, INC.
1109 MCKAY DRIVE
SAN JOSE, CA 95131

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