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Patent Assignment Details
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Reel/Frame:005842/0440   Pages: 2
Recorded: 09/10/1991
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST.
Total properties: 1
1
Patent #:
Issue Dt:
07/13/1993
Application #:
07757412
Filing Dt:
09/10/1991
Title:
A METHOD FOR PRODUCING GATE OVERLAPPED LIGHTLY DOPED DRAIN (GOLDD) STRUCTURE FOR SUBMICRON TRANSISTOR
Assignors
1
Exec Dt:
09/09/1991
2
Exec Dt:
09/09/1991
3
Exec Dt:
09/09/1991
4
Exec Dt:
09/09/1991
Assignee
1
A CORPORATION OF DE
1109 MCKAY DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
VLSI TECHNOLOGY, INC.
LEGAL DEPT.
1109 MC KAY DR.
SAN JOSE, CA 95131

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