Total properties:
28
|
|
Patent #:
|
|
Issue Dt:
|
08/27/1991
|
Application #:
|
07505242
|
Filing Dt:
|
04/05/1990
|
Title:
|
SEALED SELF ALIGNED CONTACTS USING TWO NITRIDES PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/1991
|
Application #:
|
07542573
|
Filing Dt:
|
06/22/1990
|
Title:
|
TRENCH CAPACITOR FOR LARGE SCALE INTEGRATED MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1992
|
Application #:
|
07559466
|
Filing Dt:
|
07/30/1990
|
Title:
|
METHOD FOR CREATING SELF-ALIGNED, NON-PATTERNED CONTACT AREAS & STACKED CAPACITORS USING THE METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1993
|
Application #:
|
07644902
|
Filing Dt:
|
01/23/1991
|
Title:
|
OUTPUT CONTROL CIRCUIT HAVING CONTINUOUSLY VARIABLE DRIVE CURRENT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/1992
|
Application #:
|
07644903
|
Filing Dt:
|
01/23/1991
|
Title:
|
CURRENT SUPPLY CIRCUIT FOR DRIVING HIGH CAPACITANCE LOAD IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/1992
|
Application #:
|
07644904
|
Filing Dt:
|
01/23/1991
|
Title:
|
REFERENCE GENERATOR FOR AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1992
|
Application #:
|
07681159
|
Filing Dt:
|
04/05/1991
|
Title:
|
STACKED CAPACITOR WITH SIDEWALL INSULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/1992
|
Application #:
|
07698841
|
Filing Dt:
|
05/10/1991
|
Title:
|
REACTION BARRIER FOR A MULTILAYER STRUCTURE IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/1993
|
Application #:
|
07750098
|
Filing Dt:
|
08/26/1991
|
Title:
|
SELF SEALED ALIGNED CONTACT INCORPORATING A DOPANT SOURCE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/1992
|
Application #:
|
07775111
|
Filing Dt:
|
10/11/1991
|
Title:
|
IMMERSION NOZZLES FOR METAL MELTS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/1994
|
Application #:
|
07859670
|
Filing Dt:
|
03/30/1992
|
Title:
|
LOW POWER DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/1995
|
Application #:
|
07927615
|
Filing Dt:
|
08/10/1992
|
Title:
|
LATCH-UP IMMUNE CMOS OUTPUT DRIVER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/1994
|
Application #:
|
07940084
|
Filing Dt:
|
09/03/1992
|
Title:
|
TEMPERATURE COMPENSATED VOLTAGE REFERENCE FOR AND WIDE VOLTAGE RANGES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/1994
|
Application #:
|
07961439
|
Filing Dt:
|
10/15/1992
|
Title:
|
EFFICIENT NEGATIVE CHARGE PUMP
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/1995
|
Application #:
|
07964003
|
Filing Dt:
|
10/20/1992
|
Title:
|
HIGH EFFICIENCY N-CHANNEL CHARGE PUMP HAVING A PRIMARY PUMP AND A NON-CASSCADED SECONDARY PUMP
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/1994
|
Application #:
|
07964761
|
Filing Dt:
|
10/22/1992
|
Title:
|
LOW POWER VCC AND TEMPERATURE INDEPENDENT OSCILLATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/1994
|
Application #:
|
07964912
|
Filing Dt:
|
10/22/1992
|
Title:
|
OSCILLATORLESS SUBSTRATE BIAS GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/1994
|
Application #:
|
07969418
|
Filing Dt:
|
10/30/1992
|
Title:
|
SENSE AMPLIFIER CLOCK DRIVER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/1996
|
Application #:
|
07983328
|
Filing Dt:
|
11/30/1992
|
Title:
|
STRESS MODE CIRCUIT FOR AN INTEGRATED CIRCUIT WITH ON-CHIP VOLTAGE DOWN CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/1995
|
Application #:
|
07991533
|
Filing Dt:
|
12/14/1992
|
Title:
|
FUSE PROGRAMMABLE VOLTAGE CONVERTER WITH A SECONDARY TUNING PATH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/1994
|
Application #:
|
08003028
|
Filing Dt:
|
01/11/1993
|
Title:
|
A HIGH VILTAGE GENERATOR HAVING A SELF-TIMED CLOCK CIRCUIT AND CHARGE PUMP,AND A METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/1996
|
Application #:
|
08003450
|
Filing Dt:
|
01/12/1993
|
Title:
|
WIDE RANGE POWER SUPPLY FOR INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/1994
|
Application #:
|
08010342
|
Filing Dt:
|
01/28/1993
|
Title:
|
LOW-TO-HIGH VOLTAGE TRANSLATOR WITH LATCH-UP IMMUNITY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/1994
|
Application #:
|
08013333
|
Filing Dt:
|
02/04/1993
|
Title:
|
DRAM VARIABLE ROW SELECT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/1994
|
Application #:
|
08018802
|
Filing Dt:
|
02/17/1993
|
Title:
|
SELF-TIMED BOOTSTRAP DECODER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/1995
|
Application #:
|
08037288
|
Filing Dt:
|
03/26/1993
|
Title:
|
METHOD AND CIRCUIT FOR IMPROVED TIMING AND NOISE MARGIN IN A DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/1994
|
Application #:
|
08037818
|
Filing Dt:
|
03/26/1993
|
Title:
|
METHOD AND CIRCUIT FOR CONFIGURING I/O DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/1995
|
Application #:
|
08043569
|
Filing Dt:
|
04/07/1993
|
Title:
|
SEALED SELF ALIGNED CONTACT PROCESS
|
|