Patent Assignment Details
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Reel/Frame: | 006725/0320 | |
| Pages: | 2 |
| | Recorded: | 10/07/1993 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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03/26/1996
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Application #:
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08132821
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Filing Dt:
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10/07/1993
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Title:
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CHECKING DESIGN FOR TESTABILITY RULES WITH A VHDL SIMULATOR
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Assignee
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WITTELSBACHERPLATZ 2 |
80333 MUNICH, GERMANY |
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Correspondence name and address
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BRETT A. VALIQUET
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HILL, STEADMAN & SIMPSON P.C.
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85TH FLOOR SEARS TOWER
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233 S. WACKER DRIVE
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CHICAGO, IL 60606
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