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Patent Assignment Details
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Reel/Frame:007622/0021   Pages: 3
Recorded: 08/01/1995
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
06/30/1998
Application #:
08509937
Filing Dt:
08/01/1995
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT AND LAYOUT DESIGNING METHOD FOR THE SAME
Assignor
1
Exec Dt:
07/25/1995
Assignee
1
1006 OAZA KADOMA KADOMA-SHI
OSAKA 571, JAPAN
Correspondence name and address
KENNETH L. CAGE, ESQ.
WILLIAN BRINKS HOFER GILSON & LIONE
2000 K STREET, N.W., SUITE 200
WASHINGTON, D.C. 20006

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