Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 008153/0014 | |
| Pages: | 14 |
| | Recorded: | 09/25/1996 | | |
Conveyance: | ASSIGNEE CHANGE OF ADDRESS |
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Total properties:
3
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Patent #:
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Issue Dt:
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09/19/1995
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Application #:
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08025050
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Filing Dt:
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03/01/1993
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Title:
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MULTI-CHIP MODULE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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07/25/1995
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Application #:
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08073810
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Filing Dt:
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06/07/1993
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Title:
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SIMULATION USING COMPILED FUNCTION DESCRIPTION LANGUAGE
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Patent #:
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Issue Dt:
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07/30/1996
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Application #:
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08121102
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Filing Dt:
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09/14/1993
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Title:
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TESTING INTEGRATED CIRCUITS BY CONSOLIDATING A PLURALITY OF DIGITAL SIGNALS AS A MULTILEVEL SIGNAL
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Assignee
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CENTRAL SHIN OSAKA BLDG. |
4-5-36, MIYAHARA, YODOGAWA-KU |
OSAKA-SHI 532, JAPAN |
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Correspondence name and address
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FRISHAUF HOLTZ GOODMAN LANGER & CHICK PC
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THOMAS LANGER
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767 THIRD AVENUE
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25TH FLOOR
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NEW YORK, NY 10017-2023
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