Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 009153/0671 | |
| Pages: | 3 |
| | Recorded: | 04/20/1998 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/1999
|
Application #:
|
08993537
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
SEMICONDUCTOR MEMORY HAVING HIERARCHICAL BIT LINE ARCHITECTURE WITH INTERLEAVED MASTER BITLINES
|
|
|
Assignee
|
|
|
|
|
| 10950 NORTH TANTAU AVENUE |
| CUPERTINO, CALIFORNIA 95014 |
|
|
Correspondence name and address
|
| |
ELSA KELLER
|
| |
SIEMENS CORPORATION
|
| |
INTELLECTUAL PROPERTY DEPARTMENT
|
| |
186 WOOD AVENUE SOUTH
|
| |
ISELIN, NJ 08830
|
Search Results as of:
04/27/2024 01:57 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
