Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 009197/0569 | |
| Pages: | 3 |
| | Recorded: | 05/22/1998 | | |
| Conveyance: | MERGER (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
5
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/1989
|
Application #:
|
07115278
|
Filing Dt:
|
10/30/1987
|
|
Title:
|
MAIN MEMORY ACCESS IN A MICROPROCESSOR SYSTEM WITH A CACHE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1992
|
Application #:
|
07260964
|
Filing Dt:
|
10/21/1988
|
|
Title:
|
EXTERNAL EXPANSION BUS INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1992
|
Application #:
|
07301607
|
Filing Dt:
|
01/24/1989
|
|
Title:
|
METHOD AND APPARATUS FOR AUTOMATIC MEMORY CONFIGURATION BY A COMPUTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/1997
|
Application #:
|
07975879
|
Filing Dt:
|
11/13/1992
|
|
Title:
|
COMPUTER POWER SUPPLY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/1995
|
Application #:
|
08192178
|
Filing Dt:
|
02/04/1994
|
|
Title:
|
POWER ON RESET CIRCUIT WITH CLOCK INHIBIT AND DELAYED RESET SIGNAL
|
|
|
Assignee
|
|
|
|
|
| ONE PACKARD BELL WAY |
| SACRAMENTO, CALIFORNIA 95828 |
|
|
Correspondence name and address
|
| |
FITCH, EVEN, TABIN, ET AL.
|
| |
JOHN S. PANIAGUAS
|
| |
135 S. LASALLE ST.
|
| |
SUITE 900
|
| |
CHICAGO, IL 60603
|
Search Results as of:
05/17/2024 04:21 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
