Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Reel/Frame: | 009245/0908 | |
| Pages: | 3 |
| | Recorded: | 03/30/1998 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
Total properties:
1
|
|
Patent #:
|
|
Issue Dt:
|
02/04/1997
|
Application #:
|
08191865
|
Filing Dt:
|
02/04/1994
|
Title:
|
CLOCK GENERATING MEANS FOR GENERATING BUS CLOCK AND CHIP CLOCK SYNCHRONOUSLY HAVING FREQUENCY RATIO OF N-1/N RESPONSIVE TO SYNCHRONIZATION SIGNAL FOR INHIBITING DATA TRANSFER
|
|
Assignee
|
|
|
3000 HANOVER STREET |
LEGAL DEPARTMENT, M/S 20BN |
PALO ALTO, CALIFORNIA 94304 |
|
Correspondence name and address
|
|
HEWLETT-PACKARD COMPANY
|
|
JEROME DECHANT RE: 10937272-1
|
|
LEGAL DEPARTMENT, IP SECTION
|
|
19111 PRUNERIDGE AVE., M/S 44L18
|
|
CUPERTINO, CA 95014-0795
|
Search Results as of:
05/09/2024 04:18 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|