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Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	009570/0558			Pages:	50
		Recorded:	11/09/1998
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 36

1

Patent #:	4552787	Issue Dt:	11/12/1985	Application #:	06584960	Filing Dt:	02/29/1984
Title:	DEPOSITION OF A METAL FROM AN ELECTROLESS PLATING COMPOSITION

2

Patent #:	4642618	Issue Dt:	02/10/1987	Application #:	06757897	Filing Dt:	07/23/1985
Title:	TOOL FAILURE DETECTOR

3

Patent #:	4696717	Issue Dt:	09/29/1987	Application #:	06787560	Filing Dt:	10/15/1985
Title:	PROCESS FOR AUTOMATICALLY REGENERATING COPPER CHLORIDE ETCH SOLUTIONS

4

Patent #:	4714504	Issue Dt:	12/22/1987	Application #:	06917716	Filing Dt:	10/10/1986
Title:	PROCESS OF LAMINATING A PHOTOSENSITIVE LAYER TO A SUBSTRATE

5

Patent #:	4882245	Issue Dt:	11/21/1989	Application #:	07062360	Filing Dt:	06/12/1987
Title:	PHOTORESIST COMPOSITION AND PRINTED CIRCUIT BOARDS AND PACKAGES MADE THEREWITH

6

Patent #:	5102792	Issue Dt:	04/07/1992	Application #:	07084782	Filing Dt:	08/13/1987
Title:	SELECTIVE PRODUCTION OF L-SERINE DERIVATIVE ISOMERS

7

Patent #:	4927983	Issue Dt:	05/22/1990	Application #:	07286593	Filing Dt:	12/16/1988
Title:	CIRCUIT BOARD

8

Patent #:	4940651	Issue Dt:	07/10/1990	Application #:	07292173	Filing Dt:	12/30/1988
Title:	METHOD FOR PATTERNING CATIONIC CURABLE PHOTORESIST

9

Patent #:	4900201	Issue Dt:	02/13/1990	Application #:	07318880	Filing Dt:	03/06/1989
Title:	DRILL SPINDLE DEPTH ADJUSTMENT

10

Patent #:	5010641	Issue Dt:	04/30/1991	Application #:	07374118	Filing Dt:	06/30/1989
Title:	METHOD OF MAKING MULTILAYER PRINTED CIRCUIT BOARD

11

Patent #:	5002627	Issue Dt:	03/26/1991	Application #:	07390127	Filing Dt:	08/07/1989
Title:	SPRAY ETCHING APPARATUS WITH ATOMATIC INDIVIDUALLY CONTROLLABLE ETCHING JETS

12

Patent #:	5079069	Issue Dt:	01/07/1992	Application #:	07397518	Filing Dt:	08/23/1989
Title:	CAPACITOR LAMINATE FOR USE IN CAPACITIVE PRINTED CIRCUIT BOARDS AND METHODS OF MANUFACTURE

13

Patent #:	5155655	Issue Dt:	10/13/1992	Application #:	07521588	Filing Dt:	05/10/1990
Title:	CAPACITOR LAMINATE FOR USE IN CAPACITIVE PRINTED CIRCUIT BOARDS AND METHODS OF MANUFACTURE

14

Patent #:	5097593	Issue Dt:	03/24/1992	Application #:	07525971	Filing Dt:	05/18/1990
Title:	A METHOD OF FORMING A HYBRID PRINTED CIRCUIT BOARD

15

Patent #:	5071508	Issue Dt:	12/10/1991	Application #:	07584125	Filing Dt:	10/03/1990
Title:	METHOD OF AND ARRANGEMENT FOR ETCHING AN ETCH MATERIAL CONSISTING AT LEAST PARTLY OF METAL

16

Patent #:	5200026	Issue Dt:	04/06/1993	Application #:	07700287	Filing Dt:	05/15/1991
Title:	MANUFACTURING METHOD FOR MULTI-LAYER CIRCUIT BOARDS

17

Patent #:	5092032	Issue Dt:	03/03/1992	Application #:	07700736	Filing Dt:	05/04/2008
Title:	MANUFACTURING METHOD FOR A MULTILAYER PRINTED CIRCUIT BOARD

18

Patent #:	5156730	Issue Dt:	10/20/1992	Application #:	07720677	Filing Dt:	06/25/1991
Title:	ELECTRODE ARRAY AND USE THEREOF

19

Patent #:	5451721	Issue Dt:	09/19/1995	Application #:	07764733	Filing Dt:	09/24/1991
Title:	MULTILAYER PRINTED CIRCUIT BOARD AND METHOD FOR FABRICATING SAME

20

Patent #:	5161086	Issue Dt:	11/03/1992	Application #:	07823865	Filing Dt:	01/22/1992
Title:	CAPACITOR LAMINATE FOR USE IN CAPACITIVE PRINTED CIRCUIT BOARDS AND METHODS OF MANUFACTURE

21

Patent #:	5252781	Issue Dt:	10/12/1993	Application #:	07859750	Filing Dt:	03/30/1992
Title:	SUBSTRATE MEMBER HAVING ELECTRIC LINES AND APERTURED INSULATING FILM

22

Patent #:	5261153	Issue Dt:	11/16/1993	Application #:	07864440	Filing Dt:	04/06/1992
Title:	IN SITU METHOD FOR FORMING A CAPACITIVE PCB

23

Patent #:	5264325	Issue Dt:	11/23/1993	Application #:	07918304	Filing Dt:	07/21/1992
Title:	COMPOSITION FOR PHOTO IMAGING

24

Patent #:	5278010	Issue Dt:	01/11/1994	Application #:	07956831	Filing Dt:	10/05/1992
Title:	COMPOSITION FOR PHOTO IMAGING

25

Patent #:	5439766	Issue Dt:	08/08/1995	Application #:	07976115	Filing Dt:	11/13/1992
Title:	COMPOSITION FOR PHOTO IMAGING

26

Patent #:	5418689	Issue Dt:	05/23/1995	Application #:	08012111	Filing Dt:	02/01/1993
Title:	PRINTED CIRCUIT BOARD OR CARD FOR DIRECT CHIP ATTACHMENT AND FABRICATION THEREOF

27

Patent #:	5401909	Issue Dt:	03/28/1995	Application #:	08153596	Filing Dt:	11/17/1993
Title:	PRINTED CIRCUIT BOARD WITH LOCALLY ENHANCED WIRING DENSITY

28

Patent #:	5460858	Issue Dt:	10/24/1995	Application #:	08183092	Filing Dt:	01/18/1994
Title:	METHOD FOR FORMING A SMOOTH-SURFACED INSULATING LAYER

29

Patent #:	5372670	Issue Dt:	12/13/1994	Application #:	08190422	Filing Dt:	02/02/1994
Title:	SYSTEM FOR WET APPLICATION OF A DRY FILM TO A PANEL

30

Patent #:	5450290	Issue Dt:	09/12/1995	Application #:	08195532	Filing Dt:	02/14/1994
Title:	PRINTED CIRCUIT BOARD WITH ALIGNED CONNECTIONS AND METHOD OF MAKING SAME

31

Patent #:	5517756	Issue Dt:	05/21/1996	Application #:	08247538	Filing Dt:	05/23/1994
Title:	METHOD OF MAKING SUBSTRATE MEMBER HAVING ELECTRICAL LINES AND APERTURED INSULATING FILM

32

Patent #:	5487218	Issue Dt:	01/30/1996	Application #:	08342533	Filing Dt:	11/21/1994
Title:	A METHOD FOR MAKING PRINTED CIRCUIT BOARDS WITH SELECTIVELY FILLED PLATED THROUGH HOLES

33

Patent #:	5582745	Issue Dt:	12/10/1996	Application #:	08371175	Filing Dt:	01/10/1995
Title:	METHOD OF MAKING CIRCUIT BOARDS WITH LOCALLY ENHANCED WIRING DENSITY

34

Patent #:	5510580	Issue Dt:	04/23/1996	Application #:	08413328	Filing Dt:	03/30/1995
Title:	PRINTED CIRCUIT BOARD WITH LANDLESS BLIND HOLE FOR CONNECTING AN UPPER WIRING PATTERN TO A LOWER WIRING PATTERN

35

Patent #:	5537740	Issue Dt:	07/23/1996	Application #:	08561533	Filing Dt:	11/22/1995
Title:	METHOD OF MAKING PRINTED CIRCUIT BOARD

36

Patent #:	8986498	Issue Dt:	03/24/2015	Application #:	UNAVAILABLE	Filing Dt:	04/27/2012
Title:	LABEL EJECTION DEVICE

Assignors

1

DII GROUP, INC., THE (DE CORPORATION)

Exec Dt:

10/30/1998

2

DOVATRON INTERNATIONAL, INC. (DE CORPORATION)

Exec Dt:

10/30/1998

3

MULTILAYER TECHNOLOGY, INC. (CA CORPORATION)

Exec Dt:

10/30/1998

4

DOVATRON MEXICO, INC. (DE CORPORATION)

Exec Dt:

10/30/1998

5

ORBIT SEMICONDUCTOR, INC. (DE CORPORATION)

Exec Dt:

10/30/1998

6

DOVATRON NEVADA, INC. (NV CORPORATION)

Exec Dt:

10/30/1998

7

MULTILAYER TEK L.P. (TX LIMITED PARTNERSHIP)

Exec Dt:

10/30/1998

Assignee

1

CHASE MANHATTAN BANK, AS COLLATERAL AGENT, THE

200 JERICHO QUADRANGLE

JERICHO, NEW YORK 11753

Correspondence name and address
	LORI E. LESSER, ESQ.
	425 LEXINGTON AVENUE
	NEW YORK, NY 10017

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