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Patent Assignment Details
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Reel/Frame:009728/0831   Pages: 6
Recorded: 01/25/1999
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
11/27/2001
Application #:
09146843
Filing Dt:
09/03/1998
Title:
SEMICONDUCTOR PROCESSING METHODS, METHODS OF FORMING SILICON DIOXIDE, METHODS OF FORMING TRENCH ISOLATION REGIONS, AND METHODS OF FORMING INTERLEVEL DIELECTRIC LAYERS
Assignors
1
Exec Dt:
01/14/1999
2
Exec Dt:
10/01/1998
3
Exec Dt:
01/15/1999
Assignee
1
8000 SOUTH FEDERAL WAY
BOISE, IDAHO 83706
Correspondence name and address
WELLS, ST. JOHN, ROBERTS, GREGORY ET AL.
DAVID G. LATWESEN, PH.D.
601 W. FIRST AVENUE, STE. 1300
SPOKANE, WA 99201-3828

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