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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:009958/0075   Pages: 12
Recorded: 05/03/1999
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 12
1
Patent #:
Issue Dt:
10/19/1999
Application #:
08708388
Filing Dt:
09/04/1996
Title:
MOVING PICTURE CAMERA WITH UNIVERSAL SERIAL BUS INTERFACE
2
Patent #:
Issue Dt:
01/13/1998
Application #:
08708575
Filing Dt:
09/05/1996
Title:
SEMICONDUCTOR MEMORY DEVICE WITH DATALINE UNDERSHOOT DETECTION AND REDUCED READ ACCESS TIME
3
Patent #:
Issue Dt:
07/07/1998
Application #:
08747699
Filing Dt:
11/12/1996
Title:
CIRCUIT WITH REGULATED POWER SUPPLY FOR REDUCING MEMORY DEVICE OPERATING POWER
4
Patent #:
Issue Dt:
08/24/1999
Application #:
08755289
Filing Dt:
11/22/1996
Title:
SRAM WITH FAST WRITE CAPABILITY
5
Patent #:
Issue Dt:
10/19/1999
Application #:
08822127
Filing Dt:
03/21/1997
Title:
SEMICONDUCTOR MEMORY DEVICE WITH REDUCED READ DISTURBANCE
6
Patent #:
Issue Dt:
12/22/1998
Application #:
08877038
Filing Dt:
06/17/1997
Title:
FLASH CELL HAVING SELF-TIMED PROGRAMMING
7
Patent #:
Issue Dt:
11/30/1999
Application #:
09026865
Filing Dt:
02/20/1998
Title:
DUAL COMPRESSED VIDEO BITSTREAM CAMERA FOR UNIVERSAL SERIAL BUS CONNECTION
8
Patent #:
Issue Dt:
10/05/1999
Application #:
09115375
Filing Dt:
07/14/1998
Title:
MEMORY INTEGRATED CIRCUIT WITH SHARED READ/WRITE LINE
9
Patent #:
Issue Dt:
10/19/1999
Application #:
09115376
Filing Dt:
07/13/1998
Title:
METHOD FOR PREPARING TRIMER OF ALPHA-METHYL STYRENE OR DERIVATIVES THEREOF
10
Patent #:
Issue Dt:
09/19/2000
Application #:
09115377
Filing Dt:
07/14/1998
Title:
SPLIT ARRAY SEMICONDUCTOR GRAPHICS MEMORY ARCHITECTURE SUPPORTING MASKABLE BLOCK WRITE OPERATION
11
Patent #:
Issue Dt:
11/25/2003
Application #:
09115378
Filing Dt:
07/14/1998
Title:
SEMICONDUCTOR DIE PAD PLACEMENT AND WIRE BOND
12
Patent #:
Issue Dt:
05/09/2000
Application #:
09115379
Filing Dt:
07/14/1998
Title:
MEMORY INTEGRATED CIRCUIT SUPPORTING MASKABLE BLOCK WRITE OPERATION AND ARBITRARY REDUNDANT COLUMN REPAIR
Assignors
1
Exec Dt:
06/24/1998
2
Exec Dt:
06/24/1998
3
Exec Dt:
06/24/1998
4
Exec Dt:
06/24/1998
Assignee
1
2727 NORTH FIRST STREET
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
PROSKAUER ROSE LLP
GREGG I. GOLDMAN
1585 BROADWAY
NEW YORK, NY 10036

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