Total properties:
51
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Patent #:
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Issue Dt:
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01/26/1993
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Application #:
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07773827
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Filing Dt:
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10/09/1991
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Title:
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ARRAY LAYOUT STRUCTURE FOR IMPLEMENTING LARGE HIGH-DENSITY ADDRESS DECODERS FOR GATE ARRAY MEMORIES
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Patent #:
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Issue Dt:
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08/23/1994
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Application #:
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07913543
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Filing Dt:
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07/15/1992
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Title:
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SOCKET FOR MOUNTING A PRINTED CIRCUIT BOARD MODULE
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Patent #:
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Issue Dt:
|
01/18/1994
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Application #:
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07914341
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Filing Dt:
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07/17/1992
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Title:
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COMBINED LIGHT BEAM AND ULTRASONIC TRANSDUCER SAFETY SENSING SYSTEM
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Patent #:
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Issue Dt:
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10/31/1995
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Application #:
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08082867
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Filing Dt:
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06/29/1993
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Title:
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METHOD AND APPARATUS FOR DETERMINING ERROR LOCATION
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Patent #:
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Issue Dt:
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08/08/1995
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Application #:
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08082869
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Filing Dt:
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06/29/1993
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Title:
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METHOD OF AND SYSTEM FOR LAYING OUT BUS CELLS ON AN INTEGRATED CIRCUIT CHIP
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Patent #:
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Issue Dt:
|
01/17/1995
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Application #:
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08082870
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Filing Dt:
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06/29/1993
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Title:
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PARALLEL ENCODING APPARATUS AND METHOD IMPLEMENTING CYCLIC REDUNDANCY CHECK AND REED-SOLOMON CODES
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Patent #:
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Issue Dt:
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08/29/1995
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Application #:
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08150897
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Filing Dt:
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11/12/1993
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Title:
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APPARATUS FOR CORRECTING ERRORS IN OPTICAL DISKS
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Patent #:
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Issue Dt:
|
03/27/2001
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Application #:
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08190389
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Filing Dt:
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02/02/1994
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Title:
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GENERAL PURPOSE DATA COMMUNICATIONS PROTOCOL CONVERTER
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Patent #:
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Issue Dt:
|
06/24/1997
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Application #:
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08192909
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Filing Dt:
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02/07/1994
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Title:
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FINITE FIELD POLYNOMIAL PROCESSING MODULE FOR ERROR CONTROL CODING
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Patent #:
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Issue Dt:
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08/29/1995
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Application #:
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08225690
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Filing Dt:
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04/11/1994
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Title:
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VERTICAL DETAIL ENHANCEMENT WITH STEPPED RETURN CORING
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Patent #:
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Issue Dt:
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01/23/1996
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Application #:
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08316462
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Filing Dt:
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09/30/1994
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Title:
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CMOS LEVEL SHIFTER WITH FEEDFORWARD CONTROL TO PREVENT LATCHING IN A WRONG LOGIC STATE
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Patent #:
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Issue Dt:
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07/01/1997
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Application #:
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08363597
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Filing Dt:
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12/23/1994
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Title:
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LEARNING METHOD FOR NEURAL NETWORK HAVING DISCRETE INTERCONNECTION STRENGTHS
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Patent #:
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Issue Dt:
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05/27/1997
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Application #:
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08421348
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Filing Dt:
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04/13/1995
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Title:
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HAZARDOUS MATERIAL PROTECTION SUIT WITH CARRYING HANDLES
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Patent #:
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Issue Dt:
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04/30/1996
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Application #:
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08493016
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Filing Dt:
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06/21/1995
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Title:
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HIERARCHICAL FLOORPLANNER FOR GATE ARRAY DESIGN LAYOUT
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|
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Patent #:
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Issue Dt:
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07/01/1997
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Application #:
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08517122
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Filing Dt:
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08/21/1995
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Title:
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CARRIERS FOR IC PACKAGES
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|
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Patent #:
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|
Issue Dt:
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09/09/1997
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Application #:
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08518939
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Filing Dt:
|
08/24/1995
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Title:
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MULTIPLE DEVICE CARRIER
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Patent #:
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|
Issue Dt:
|
03/10/1998
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Application #:
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08561756
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Filing Dt:
|
11/22/1995
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Title:
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HIGH BIT RATE START CODE SEARCHING AND DETECTING CIRCUIT AND METHOD
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Patent #:
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|
Issue Dt:
|
06/16/1998
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Application #:
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08567592
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Filing Dt:
|
12/05/1995
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Title:
|
LOW POWER HIGH SPEED MPEG VIDEO VARIABLE LENGTH DECODER
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|
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Patent #:
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Issue Dt:
|
04/22/1997
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Application #:
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08572922
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Filing Dt:
|
12/15/1995
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Title:
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INTEGRATED CIRCUIT PACKAGE ASSEMBLY
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|
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Patent #:
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|
Issue Dt:
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12/01/1998
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Application #:
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08612512
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Filing Dt:
|
03/07/1996
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Title:
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MPEG ENCODING AND DECODING SYSTEM FOR MULTIMEDIA APPLICATIONS
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|
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Patent #:
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|
Issue Dt:
|
07/07/1998
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Application #:
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08639817
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Filing Dt:
|
04/29/1996
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Title:
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AUTOMATED TEST FIXTURE CONTROL SYSTEM
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|
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Patent #:
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|
Issue Dt:
|
08/05/1997
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Application #:
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08641792
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Filing Dt:
|
05/02/1996
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Title:
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SYSTEM FOR ULTRASONIC REMOVAL OF AIR BUBBLES FROM THE SURFACE OF AN ELECTROPLATED ARTICLE
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|
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Patent #:
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|
Issue Dt:
|
10/21/1997
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Application #:
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08648795
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Filing Dt:
|
05/16/1996
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Title:
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SHARED DRAM I/O DATABUS FOR HIGH SPEED OPERATION
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|
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Patent #:
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|
Issue Dt:
|
04/21/1998
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Application #:
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08655132
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Filing Dt:
|
05/30/1996
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Title:
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AUTOMATIC SOFTWARE LICENSE MANAGER
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|
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Patent #:
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|
Issue Dt:
|
03/10/1998
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Application #:
|
08659599
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Filing Dt:
|
06/06/1996
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Title:
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BUFFER WITH DRIVE CHARACTERISTICS CONTROLLABLE BY SOFTWARE
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|
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Patent #:
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|
Issue Dt:
|
12/09/1997
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Application #:
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08720498
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Filing Dt:
|
09/30/1996
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Title:
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SELF TIGHTENING CLAMP
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|
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Patent #:
|
|
Issue Dt:
|
08/04/1998
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Application #:
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08732654
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Filing Dt:
|
10/16/1996
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Title:
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METHOD AND APPARATUS FOR CONTROLLING PLATING THICKNESS OF A WORKPIECE
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|
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Patent #:
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|
Issue Dt:
|
07/07/1998
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Application #:
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08732655
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Filing Dt:
|
10/16/1996
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Title:
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METHOD AND APPARATUS USING AN ANODE BASKET FOR ELECTROPLATING A WORKPIECE
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|
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Patent #:
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|
Issue Dt:
|
11/10/1998
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Application #:
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08733309
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Filing Dt:
|
10/17/1996
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Title:
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ASYMMETRICAL VERTICAL LIGHTLY DOPED DRAIN TRANSISTOR AND METHOD OF FORMING THE SAME
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|
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Patent #:
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|
Issue Dt:
|
09/29/1998
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Application #:
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08733311
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Filing Dt:
|
10/17/1996
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Title:
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SYMMETRICAL VERTICAL LIGHTLY DOPED DRAIN TRANSISTOR AND METHOD OF FORMING THE SAME
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|
|
Patent #:
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|
Issue Dt:
|
10/13/1998
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Application #:
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08733312
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Filing Dt:
|
10/17/1996
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Title:
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FIELD EFFECT TRANSISTOR HAVING AN ARCHED GATE AND MANUFACTURING METHOD THEREOF
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|
|
Patent #:
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|
Issue Dt:
|
04/14/1998
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Application #:
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08755049
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Filing Dt:
|
11/22/1996
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Title:
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LEAD FRAME DRYER
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|
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Patent #:
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|
Issue Dt:
|
08/11/1998
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Application #:
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08760007
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Filing Dt:
|
12/03/1996
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Title:
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MICRO ROM TESTING SYSTEM USING MICRO ROM TIMING CIRCUITS FOR TESTING OPERATIONS
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|
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Patent #:
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|
Issue Dt:
|
04/28/1998
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Application #:
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08764807
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Filing Dt:
|
12/12/1996
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Title:
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ANODE BASKET FOR CONTROLLING PLATING THICKNESS DISTRIBUTION
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|
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Patent #:
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|
Issue Dt:
|
08/25/1998
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Application #:
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08767135
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Filing Dt:
|
12/19/1996
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Title:
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HIGH-SPEED MAIN AMPLIFIER WITH REDUCED ACCESS AND OUTPUT DISABLE TIME PERIODS
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|
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Patent #:
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|
Issue Dt:
|
07/21/1998
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Application #:
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08781388
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Filing Dt:
|
01/13/1997
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Title:
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LATCHED DRAM WRITE BUS FOR QUICKLY CLEARING DRAM ARRAY WITH MINIMUM POWER USAGE
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|
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Patent #:
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|
Issue Dt:
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07/14/1998
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Application #:
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08783800
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Filing Dt:
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01/15/1997
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Title:
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CARRIER CART
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|
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08786904
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Filing Dt:
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01/22/1997
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Title:
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SPACER AND SHIM ASSEMBLY FOR FLUID POWERED DIAPHRAGM PUMPS
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Patent #:
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|
Issue Dt:
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08/04/1998
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Application #:
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08808406
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Filing Dt:
|
02/28/1997
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Title:
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INTEGRATED CIRCUIT PACKAGE ASSEMBLY
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|
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Patent #:
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|
Issue Dt:
|
06/16/1998
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Application #:
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08810787
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Filing Dt:
|
03/05/1997
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Title:
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AUTOMATICALLY ALIGNING TOOL FOR UNIFORMLY APPLYING A CONTROLLED FORCE TO AN OBJECT
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|
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Patent #:
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|
Issue Dt:
|
04/25/2000
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Application #:
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08828780
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Filing Dt:
|
03/27/1997
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Title:
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DMA CONTROLLER WITH SEMAPHORE COMMUNICATION PROTOCOL
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|
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Patent #:
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|
Issue Dt:
|
11/17/1998
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Application #:
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08845840
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Filing Dt:
|
04/28/1997
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Title:
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THREE-TRANSISTOR STATIC STORAGE CELL
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Patent #:
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|
Issue Dt:
|
05/30/2000
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Application #:
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08857256
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Filing Dt:
|
05/16/1997
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Title:
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PROTOCOL CONVERTER CONTROLLER HAVING DISTRIBUTED ARCHITECTURE
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Patent #:
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Issue Dt:
|
08/31/1999
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Application #:
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08954628
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Filing Dt:
|
10/20/1997
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Title:
|
RAM HAVING MULTIPLE PORTS SHARING COMMON MEMORY LOCATIONS
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|
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Patent #:
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|
Issue Dt:
|
10/31/2000
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Application #:
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08984076
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Filing Dt:
|
12/03/1997
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Title:
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GROUNDED PACKAGED SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
|
|
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Patent #:
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|
Issue Dt:
|
12/26/2000
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Application #:
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09006190
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Filing Dt:
|
01/13/1998
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Title:
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MULTI-PORT RAM HAVING FUNCTIONALLY IDENTICAL PORTS
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|
|
Patent #:
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|
Issue Dt:
|
08/08/2000
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Application #:
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09006191
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Filing Dt:
|
01/13/1998
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Title:
|
MUTI-PORT MEMORY DEVIVE HAVING MASKING REGISTERS
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|
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Patent #:
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|
Issue Dt:
|
12/05/2000
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Application #:
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09012460
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Filing Dt:
|
01/23/1998
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Title:
|
INDEPENDENT CHIP SELECT FOR SRAM AND DRAM IN A MULTI-PORT RAM
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|
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Patent #:
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|
Issue Dt:
|
07/11/2000
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Application #:
|
09018343
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Filing Dt:
|
02/04/1998
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Title:
|
ADDRESSING SYSTEM IN A MULTI-PORT RAM HAVING MAIN AND CACHE MEMORIES
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|
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Patent #:
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|
Issue Dt:
|
09/28/1999
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Application #:
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09024559
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Filing Dt:
|
02/17/1998
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Title:
|
DUAL CLOCKING SCHEME IN A MULTI-PORT RAM
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|
|
Patent #:
|
|
Issue Dt:
|
08/20/1996
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Application #:
|
29034981
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Filing Dt:
|
12/19/1994
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Title:
|
CASSETTE GRIPPER
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|