Patent Assignment Details
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| Reel/Frame: | 010023/0678 | |
| Pages: | 2 |
| | Recorded: | 06/10/1999 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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03/14/2000
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Application #:
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08968586
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Filing Dt:
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11/13/1997
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Title:
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METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING A DRAM HAVING REDUCED PARASITIC BIT LINE CAPACITY
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Assignees
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| 6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU |
| TOKYO, JAPAN 75265 |
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| 13500 NORTH CENTRAL EXPRESSWAY |
| DALLAS, USA 75265 |
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Correspondence name and address
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ANTONELLI, TERRY, STOUT, ET AL.
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WILLIAM I. SOLOMON
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1300 NORTH SEVENTEENTH STREET
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SUITE 1800
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ARLINGTON, VA 22209
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