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Patent #:
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Issue Dt:
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03/06/1984
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Application #:
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06267213
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Filing Dt:
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05/26/1981
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Title:
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THRESHOLD VOLTAGE CONTROL NETWORK FOR INTEGRATED CIRCUIT FIELD-EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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05/29/1984
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Application #:
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06303374
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Filing Dt:
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09/18/1981
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Title:
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METHOD AND DEVICE FOR ENCODING PRODUCT AND PROGRAMMING INFORMATION IN SEMICONDUCTORS
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Patent #:
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Issue Dt:
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01/01/1985
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Application #:
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06343845
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Filing Dt:
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01/29/1982
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Title:
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METHOD OF FABRICATING AN MOS MEMORY ARRAY HAVING ELECTRICALLY- PROGRAMMABLE AND ELECTRICALLY-ERASABLE STORAGE DEVICES INCORPORATED THEREIN
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Patent #:
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Issue Dt:
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12/10/1985
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Application #:
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06343847
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Filing Dt:
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01/29/1982
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Title:
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ELECTRICALLY-PROGRAMMABLE AND ELECTRICALLY-ERASABLE MOS MEMORY DEVICE
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Patent #:
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Issue Dt:
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12/06/1983
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Application #:
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06346162
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Filing Dt:
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02/05/1982
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Title:
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METHOD AND DEVICE FOR PROVIDING PROCESS AND TEST INFORMATION IN SEMICONDUCTORS
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Patent #:
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Issue Dt:
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04/16/1985
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Application #:
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06346891
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Filing Dt:
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02/08/1982
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Title:
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CHARGE PUMP FOR PROVIDING PROGRAMMING VOLTAGE TO THE WORD LINES IN A SEMICONDUCTOR MEMORY ARRAY
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Patent #:
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Issue Dt:
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12/18/1984
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Application #:
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06367332
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Filing Dt:
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04/12/1982
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Title:
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ELECTRICAL PARTITIONING SCHEME FOR IMPROVING YIELDS DURING THE MANUFACTURE OF SEMICONDUCTOR MEMORY ARRAYS
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Patent #:
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Issue Dt:
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10/08/1985
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Application #:
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06439602
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Filing Dt:
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11/05/1982
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Title:
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NON-VOLATILE MEMORY CELL FUSE ELEMENT
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Patent #:
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Issue Dt:
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03/19/1985
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Application #:
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06481542
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Filing Dt:
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04/04/1983
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Title:
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CIRCUIT CHIP
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Patent #:
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Issue Dt:
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10/23/1984
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Application #:
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06492367
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Filing Dt:
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05/11/1983
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Title:
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DIGITAL MEMORY SYSTEM UTILIZING FAST AND SLOW ADDRESS DEPENDENT ACCESS CYCLES
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Patent #:
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Issue Dt:
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05/01/1984
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Application #:
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06505624
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Filing Dt:
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06/20/1983
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Title:
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METHOD OF PLASMA ETCHING OF FILMS CONTAINING CHROMIUM
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Patent #:
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Issue Dt:
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04/22/1986
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Application #:
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06540246
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Filing Dt:
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10/11/1983
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Title:
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STEP SHAPE TAILORING BY PHASE ANGLE VARIATION RF BIAS SPUTTERING
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Patent #:
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Issue Dt:
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08/30/1988
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Application #:
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06546593
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Filing Dt:
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10/28/1983
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Title:
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FAULT-TOLERANT MEMORY ARRAY
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Patent #:
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Issue Dt:
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02/16/1988
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Application #:
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06581684
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Filing Dt:
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02/21/1984
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Title:
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CMOS EPROM SENSE AMPLIFIER
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Patent #:
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Issue Dt:
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09/16/1986
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Application #:
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06581685
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Filing Dt:
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02/21/1984
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Title:
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ERROR CHECKING AND CORRECTION CIRCUITRY FOR USE WITH AN ELECTRICALLY-PROGRAMMABLE AND ELECTRICALLY-ERASABLE MEMORY ARRAY
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Patent #:
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Issue Dt:
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10/14/1986
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Application #:
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06582438
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Filing Dt:
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02/22/1984
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Title:
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REDUNDANCY CIRCUIT FOR USE IN A SEMICONDUCTOR MEMORY ARRAY
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Patent #:
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Issue Dt:
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12/10/1985
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Application #:
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06595573
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Filing Dt:
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03/30/1984
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Title:
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LOGIC FAMILIES INTERFACE CIRCUIT AND HAVING A CMOS LATCH FOR CONTROLLING HYSTERESIS
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Patent #:
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Issue Dt:
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02/12/1985
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Application #:
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06597952
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Filing Dt:
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04/09/1984
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Title:
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SELECTIVE PROCESS FOR ETCHING CHROMIUM
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Patent #:
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Issue Dt:
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05/07/1985
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Application #:
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06603858
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Filing Dt:
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04/25/1984
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Title:
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METHOD OF FORMING A DIELECTRIC LAYER COMPRISING A GETTERING MATERIAL
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Patent #:
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Issue Dt:
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03/10/1987
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Application #:
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06603860
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Filing Dt:
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04/25/1984
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Title:
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INTEGRATED CIRCUIT INTERFACE
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Patent #:
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Issue Dt:
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01/21/1986
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Application #:
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06603862
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Filing Dt:
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04/25/1984
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Title:
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INTERATED CIRCUIT BIMETAL LAYER
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Patent #:
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Issue Dt:
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04/15/1986
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Application #:
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06679855
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Filing Dt:
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12/10/1984
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Title:
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CIRCUIT CHIP
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Patent #:
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Issue Dt:
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07/14/1987
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Application #:
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06681768
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Filing Dt:
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12/14/1984
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Title:
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PROCESS FOR CONTROLLING MOBILE ION CONTAMINATION IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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04/28/1987
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Application #:
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06691258
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Filing Dt:
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01/15/1985
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Title:
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INTEGRATED SCHOTTKY LOGIC READ ONLY MEMORY
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Patent #:
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Issue Dt:
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06/16/1987
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Application #:
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06699551
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Filing Dt:
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02/08/1985
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Title:
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CHARGE PUMP FOR PROVIDING PROGRAMMING VOLTAGE TO THE WORD LINES IN A SEMICONDUCTOR MEMORY ARRAY
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Patent #:
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Issue Dt:
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06/09/1987
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Application #:
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06752435
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Filing Dt:
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07/08/1985
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Title:
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FIBER OPTIC INSPECTION SYSTEM
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Patent #:
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Issue Dt:
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10/13/1987
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Application #:
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06803536
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Filing Dt:
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12/02/1985
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Title:
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PROGRAMMABLE, ASYNCHRONOUS LOGIC CELL AND ARRAY
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Patent #:
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Issue Dt:
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12/15/1987
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Application #:
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06815426
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Filing Dt:
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12/31/1985
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Title:
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DIELECTRIC BARRIER MATERIAL
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Patent #:
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Issue Dt:
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02/10/1987
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Application #:
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06815603
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Filing Dt:
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01/02/1986
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Title:
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PLANARIZATION OF DIELECTRIC LAYERS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/12/1988
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Application #:
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06837871
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Filing Dt:
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03/07/1986
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Title:
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CONTROLLED MODE FIELD EFFECT TRANSISTORS AND METHOD THEREFORE
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Patent #:
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Issue Dt:
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11/15/1988
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Application #:
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06868114
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Filing Dt:
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05/27/1986
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Title:
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APPARATUS FOR PAGE MODE PROGRAMMING OF AN EEPROM CELL ARRAY WITH FALSE LOADING PROTECTION
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Patent #:
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Issue Dt:
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11/08/1988
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Application #:
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06869207
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Filing Dt:
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05/30/1986
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Title:
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BLOCK ELECTRICALLY ERASABLE EEPROM
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Patent #:
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Issue Dt:
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01/05/1988
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Application #:
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06890874
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Filing Dt:
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07/25/1986
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Title:
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DIELECTRIC BARRIER MATERIAL
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Patent #:
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Issue Dt:
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04/17/1990
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Application #:
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06928527
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Filing Dt:
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11/07/1986
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Title:
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PROGRAMMABLE LOGIC CELL AND ARRAY
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Patent #:
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Issue Dt:
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10/20/1987
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Application #:
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06936965
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Filing Dt:
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12/01/1986
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Title:
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MOS FLOATING GATE MEMORY CELL AND PROCESS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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06/28/1988
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Application #:
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06943986
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Filing Dt:
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12/18/1986
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Title:
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MEMORY CELL WITH DUAL COLLECTOR, ACTIVE LOAD TRANSISTORS
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Patent #:
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Issue Dt:
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01/01/1991
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Application #:
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07048532
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Filing Dt:
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05/08/1987
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Title:
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INTEGRATED SEMICONDUCTOR PACKAGE
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Patent #:
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Issue Dt:
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04/18/1989
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Application #:
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07074085
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Filing Dt:
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07/16/1987
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Title:
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MOS FLOATING GATE MEMORY CELL CONTAINING TUNNELING DIFFUSION REGION IN CONTACT WITH DRAIN AND EXTENDING UNDER EDGES OF FIELD OXIDE
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Patent #:
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Issue Dt:
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07/04/1989
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Application #:
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07076050
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Filing Dt:
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07/21/1987
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Title:
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SYSTEM FOR PROGRAMMING GRAPHICALLY A PROGRAMMABLE, ASYNCHRONOUS LOGIC CELL AND ARRAY
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Patent #:
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Issue Dt:
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05/16/1989
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Application #:
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07142641
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Filing Dt:
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01/11/1988
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Title:
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EPROM FABRICATION PROCESS
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Patent #:
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Issue Dt:
|
05/23/1989
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Application #:
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07145467
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Filing Dt:
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01/19/1988
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Title:
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EEPROM FABRICATION PROCESS
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Patent #:
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Issue Dt:
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07/25/1989
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Application #:
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07152313
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Filing Dt:
|
02/04/1988
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Title:
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FABRICATION PROCESS FOR EEPROMS WITH HIGH VOLTAGE TRANSISTORS
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Patent #:
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Issue Dt:
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08/08/1989
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Application #:
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07179527
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Filing Dt:
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04/08/1988
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Title:
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THREE TRANSISTOR HIGH ENDURANCE EEPROM CELL
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Patent #:
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Issue Dt:
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12/19/1989
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Application #:
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07212974
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Filing Dt:
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06/29/1988
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Title:
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CURRENT-REGULATED, VOLTAGE-REGULATED ERASE CIRCUIT FOR EEPROM MEMORY CELLS
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Patent #:
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|
Issue Dt:
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07/02/1991
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Application #:
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07212975
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Filing Dt:
|
06/29/1988
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|
Title:
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FAULT TOLERANT DIFFERENTIAL MEMORY CELL AND SENSING
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Patent #:
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Issue Dt:
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08/22/1989
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Application #:
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07219924
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Filing Dt:
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07/15/1988
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Title:
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EPROM FABRICATION PROCESS FORMING TUB REGIONS FOR HIGH VOLTAGE DEVICE
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Patent #:
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Issue Dt:
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08/14/1990
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Application #:
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07242708
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Filing Dt:
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09/09/1988
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Title:
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TRANSISTOR CONSTRUCTION FOR LOW NOISE OUTPUT DRIVER
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Patent #:
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Issue Dt:
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05/30/1989
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Application #:
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07244977
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Filing Dt:
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09/15/1988
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Title:
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REFERENCE VOLTAGE GENERATOR
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Patent #:
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Issue Dt:
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01/16/1990
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Application #:
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07256915
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Filing Dt:
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10/11/1988
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Title:
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OUTPUT MACROCELL FOR PROGRAMMABLE LOGIC DEVICE
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Patent #:
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Issue Dt:
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03/06/1990
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Application #:
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07265830
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Filing Dt:
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10/31/1988
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Title:
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LOW POWER LOGIC ARRAY DEVICE
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Patent #:
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Issue Dt:
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08/14/1990
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Application #:
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07274428
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Filing Dt:
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11/21/1988
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Title:
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FLUXING AGENT
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Patent #:
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Issue Dt:
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05/01/1990
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Application #:
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07290386
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Filing Dt:
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12/27/1988
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Title:
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MEMORY CELL CIRCUIT WITH SUPPLEMENTAL CURRENT
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Patent #:
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Issue Dt:
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08/21/1990
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Application #:
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07338708
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Filing Dt:
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04/14/1989
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Title:
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MEMORY CURRENT SINK
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Patent #:
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Issue Dt:
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03/19/1991
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Application #:
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07354654
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Filing Dt:
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05/19/1989
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Title:
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DIFFERENTIAL SWITCHED-CAPACITOR SIGMA-DELTA MODULATOR
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Patent #:
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Issue Dt:
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02/25/1992
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Application #:
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07365664
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Filing Dt:
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06/13/1989
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Title:
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MULTIPLE PART MEMORY INCLUDING MERGED BIPOLAR TRANSISTORS
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Patent #:
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Issue Dt:
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02/18/1992
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Application #:
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07378106
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Filing Dt:
|
07/11/1989
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Title:
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PROGRAMMABLE LOGIC CELL AND ARRAY
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Patent #:
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Issue Dt:
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12/31/1991
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Application #:
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07391059
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Filing Dt:
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08/09/1989
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Title:
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MEMORY INPUT DATA TEST ARRANGEMENT
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Patent #:
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Issue Dt:
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05/28/1991
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Application #:
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07427160
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Filing Dt:
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10/25/1989
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Title:
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PROGRAMMABLE LOGIC CELL AND ARRAY
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Patent #:
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|
Issue Dt:
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06/11/1991
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Application #:
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07502221
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Filing Dt:
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03/30/1990
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Title:
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LOGIC OUTPUT CONTROL CIRCUIT FOR A LATCH
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Patent #:
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|
Issue Dt:
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05/11/1993
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Application #:
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07514590
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Filing Dt:
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04/26/1990
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Title:
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METHOD AND AN APPARATUS FOR DISPLAYING GRAPHICAL DATA RECEIVED FROM A REMOTE COMPUTER BY A LOCAL COMPUTER
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Patent #:
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Issue Dt:
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11/13/1990
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Application #:
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07522476
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Filing Dt:
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05/10/1990
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Title:
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SEALED CHARGE STORAGE STRUCTURE
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Patent #:
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|
Issue Dt:
|
03/31/1992
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Application #:
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07551642
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Filing Dt:
|
07/10/1990
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Title:
|
APPARATUS FOR PAGE MODE PROGRAMMING OF AN EEPROM CELL ARRAY WITH FALSE LOADING PROTECTION
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|
|
|
Patent #:
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|
Issue Dt:
|
11/12/1991
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Application #:
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07592605
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Filing Dt:
|
10/04/1990
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Title:
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MULTISTAGE OFFSET-CANCELLED VOLTAGE COMPARATOR
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Patent #:
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Issue Dt:
|
01/14/1992
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Application #:
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07596690
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Filing Dt:
|
10/12/1990
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Title:
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METHOD OF FORMING A CAEEIRLESS SURFACE MOUNTED INTERGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
|
09/01/1992
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Application #:
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07608415
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Filing Dt:
|
11/02/1990
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|
Title:
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PROGRAMMABLE LOGIC CELL AND ARRAY
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Patent #:
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|
Issue Dt:
|
11/19/1991
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Application #:
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07609017
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Filing Dt:
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10/29/1990
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Title:
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PROGRAMMABLE AND ERASABLE MOS MEMORY DEVICE
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Patent #:
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Issue Dt:
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02/04/1992
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Application #:
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07616460
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Filing Dt:
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11/21/1990
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Title:
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NARROW WIDTH EEPROM WITH SINGLE DIFFUSION ELECTRODE FORMATION
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Patent #:
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Issue Dt:
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01/07/1992
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Application #:
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07626999
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Filing Dt:
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12/13/1990
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH GLOBAL AND LOCAL PRODUCT TERMS
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Patent #:
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Issue Dt:
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02/04/1992
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Application #:
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07642031
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Filing Dt:
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01/16/1991
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Title:
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GRAVITY-HELD ALIGNMENT MEMBER FOR MANUFACTURE OF A LEADLESS CHIP CARRIER
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Patent #:
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Issue Dt:
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03/10/1992
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Application #:
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07647308
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Filing Dt:
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01/28/1991
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Title:
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FABRICATING A NARROW WIDTH SINGLE DIFFUSION ELECTRODE FORMATION
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Patent #:
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Issue Dt:
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08/11/1992
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Application #:
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07704941
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Filing Dt:
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05/23/1991
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Title:
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METHOD OF MANUFACTURING A REPAIRABLE MULTI-CHIP MODULE
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Patent #:
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Issue Dt:
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10/13/1992
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Application #:
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07705243
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Filing Dt:
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05/24/1991
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Title:
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PROGRAMMABLE LOGIC CELL AND ARRAY
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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07720202
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Filing Dt:
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06/24/1991
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Title:
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APPARATUS TO TRANSFORM TIME TO FREQUENCY AND FREQUENCY TO TIME OF DATA SIGNALS
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Patent #:
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Issue Dt:
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08/11/1992
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Application #:
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07751319
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Filing Dt:
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08/28/1991
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Title:
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CARRIERLESS SURFACE MOUNTED INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
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09/14/1993
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Application #:
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07752419
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Filing Dt:
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08/30/1991
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Title:
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VERSATILE PROGRAMMABLE LOGIC CELL FOR USE IN CONFIGURABLE LOGIC ARRAYS
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Patent #:
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Issue Dt:
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10/13/1992
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Application #:
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07755686
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Filing Dt:
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09/06/1991
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Title:
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CLOCK SELECTION FOR STORAGE ELEMENTS OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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02/23/1993
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Application #:
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07763921
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Filing Dt:
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09/23/1991
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH MULTIPLE SHARED LOGIC ARRAYS
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Patent #:
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Issue Dt:
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11/02/1993
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Application #:
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07789292
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Filing Dt:
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11/08/1991
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Title:
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WIRELESS COMMUNICATION SYSTEM
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Patent #:
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Issue Dt:
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11/30/1993
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Application #:
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07789348
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Filing Dt:
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11/08/1991
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Title:
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METHOD AND AN APPARATUS FOR ESTABLISHING THE FUNCTIONAL CAPABILITIES FOR WIRELESS COMMUNICATION BETWEEN A BASE UNIT AND A REMOTE UNIT
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Patent #:
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Issue Dt:
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11/02/1993
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Application #:
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07789731
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Filing Dt:
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11/08/1991
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Title:
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METHOD OF ENCODING TWO DIGITAL DATA SIGNALS
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Patent #:
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Issue Dt:
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05/18/1993
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Application #:
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07789736
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Filing Dt:
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11/08/1991
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Title:
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METHOD AND AN APPARATUS FOR RE-ESTABLISHING WIRELESS COMMUNICATION BETWEEN A BASE UNIT AND A REMOTE UNIT
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Patent #:
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Issue Dt:
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09/21/1993
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Application #:
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07789737
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Filing Dt:
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11/08/1991
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Title:
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METHOD AND AN APPARATUS FOR ESTABLISHING A WIRELESS COMMUNICATION LINK BETWEEN A BASE UNIT AND A REMOTE UNIT
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Patent #:
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Issue Dt:
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01/11/1994
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Application #:
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07790634
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Filing Dt:
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11/08/1991
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Title:
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METHOD AND APPARATUS FOR CONTROLLING TRANSMISSION POWER OF A RREMOTE UNIT COMMUNICATING WITH A BASE UNIT OVER A COMMON FREQUENCY CHANNEL
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Patent #:
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Issue Dt:
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05/03/1994
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Application #:
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07841415
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Filing Dt:
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02/26/1992
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Title:
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ELECTRONIC FLASHER UNIT
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Patent #:
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Issue Dt:
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07/27/1993
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Application #:
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07850285
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Filing Dt:
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03/12/1992
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Title:
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INTEGRATED LOGIC CIRCUIT WITH FUNCTIONALLY FLEXIBLE INPUT/OUTPUT MACROCELLS
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Patent #:
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Issue Dt:
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01/12/1993
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Application #:
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07859079
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Filing Dt:
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03/27/1992
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Title:
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METHOD OF FORMING INTEGRATED LEADOUTS FOR A CHIP CARRIER
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Patent #:
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Issue Dt:
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08/23/1994
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Application #:
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07881336
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Filing Dt:
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05/11/1992
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Title:
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BIT LEVEL PIPELINE DIVIDE CIRCUIT AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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02/01/1994
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Application #:
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07894710
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Filing Dt:
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06/05/1992
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Title:
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RECEIVER HAVING A LOCAL OSCILLATOR FIRST SYNCHRONIZED TO A REFERENCE FREQUENCY AND THEN TO A RECEIVED SIGNAL
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Patent #:
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Issue Dt:
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07/04/1995
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Application #:
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07898862
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Filing Dt:
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06/15/1992
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Title:
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METHOD AND APPARATUS FOR MOTION ESTIMATION
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Patent #:
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Issue Dt:
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10/25/1994
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Application #:
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07919853
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Filing Dt:
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07/27/1992
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Title:
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METHOD AND APPARATUS FOR CONVERTING IMAGE DATA
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Patent #:
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Issue Dt:
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10/19/1993
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Application #:
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07933332
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Filing Dt:
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08/21/1992
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Title:
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METHOD AND APPARATUS FOR COMBINED FREQUENCY OFFSET AND TIMING OFFSET ESTIMATION
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Patent #:
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Issue Dt:
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06/08/1993
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Application #:
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07935116
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Filing Dt:
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08/25/1992
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Title:
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PROGRAMMABLE LOGIC CELL AND ARRAY WITH BUS REPEATERS
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Patent #:
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Issue Dt:
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06/08/1993
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Application #:
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07939319
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Filing Dt:
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09/01/1992
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Title:
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METHOD OF FORMING A CHIP PACKAGE AND PACKAGE INTERCONNECTS
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Patent #:
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Issue Dt:
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12/21/1993
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Application #:
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07948481
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Filing Dt:
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09/21/1992
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Title:
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HIGH SPEED MEMORY SENSE AMPLIFIER WITH NOISE REDUCTION
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Patent #:
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Issue Dt:
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01/17/1995
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Application #:
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07951207
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Filing Dt:
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09/25/1992
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Title:
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METHOD FOR TESTING NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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10/26/1993
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Application #:
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07959031
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Filing Dt:
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10/08/1992
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Title:
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METHOD OF ASSEMBLING A MODULE FOR A SMART CARD
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Patent #:
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Issue Dt:
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06/14/1994
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Application #:
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07962123
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Filing Dt:
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10/15/1992
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Title:
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VOLTAGE LIMITING DEVICE HAVING IMPROVED GATE-AIDED BREAKDOWN
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Patent #:
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Issue Dt:
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11/21/1995
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Application #:
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07974262
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Filing Dt:
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11/10/1992
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Title:
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FABRICATION PROCESS FOR PROGRAMMABLE AND ERASABLE MOS MEMORY DEVICE
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|
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Patent #:
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Issue Dt:
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08/23/1994
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Application #:
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08020291
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Filing Dt:
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02/19/1993
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Title:
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INTEGRATION OF HIGH PERFORMANCE SUBMICRON CMOS AND DUAL-POLY NON- VOLATILE MEMORY DEVICES USING A THIRD POLYSILICON LAYER
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|
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Patent #:
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Issue Dt:
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10/05/1993
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Application #:
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08029148
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Filing Dt:
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03/10/1993
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Title:
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BUMPLESS BONDING PROCESS HAVING MULTILAYER METALLIZATION
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