Patent Assignment Details
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Reel/Frame: | 010468/0788 | |
| Pages: | 2 |
| | Recorded: | 12/15/1999 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09464066
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Filing Dt:
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12/15/1999
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Title:
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METHOD FOR THE INTEGRATION OF RESISTORS AND ESD SELF-PROTECTED TRANSISTORS IN AN INTEGRATED DEVICE WITH A MEMORY MATRIX MANUFACTURED BY MEANS OF A PROCESS FEATURING SELF-ALIGNED SOURCE (SAS) FORMATION AND JUNCTION SALICIDATION
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Assignee
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VIA C. OLIVETTI, 2 |
I-20041 AGRATE BRIANZA, ITALY |
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Correspondence name and address
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SEED AND BERRY LLP
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E. RUSSELL TARLETON
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6300 COLUMBIA CENTER
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701 FIFTH AVENUE
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SEATTLE, WA 98104-7092
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