Patent Assignment Details
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Reel/Frame: | 010845/0356 | |
| Pages: | 2 |
| | Recorded: | 05/22/2000 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09474872
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Filing Dt:
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12/29/1999
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Title:
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REDUCED POWER BIT LINE SELECTION IN MEMORY CIRCUITS
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Assignee
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BUBAL-EUB, ICHON-SHI |
SAN 136-1, AMI-RI |
KYOUNGKI-DO, KOREA, REPUBLIC OF |
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Correspondence name and address
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TOWNSEND AND TOWNSEND AND CREW LLP
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HORACE H. NG
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TWO EMBARCADERO CENTER, 8TH FLOOR
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SAN FRANCISCO, CA 94111-3834
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