Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 011299/0758 | |
| Pages: | 4 |
| | Recorded: | 11/16/2000 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09713968
|
Filing Dt:
|
11/16/2000
|
|
Title:
|
Delay locked loop circuit and method for generating internal clock signal
|
|
|
Assignee
|
|
|
|
|
| PALDAL-GU, SUWON-CITY |
| 416, MAETAN-DONG |
| KYUNGKI-DO, KOREA, REPUBLIC OF |
|
|
Correspondence name and address
|
| |
F. CHAU & ASSOCIATES, LLP
|
| |
FRANK CHAU, ESQ.
|
| |
1900 HEMPSTEAD TURNPIKE, SUITE 501
|
| |
EAST MEADOW, NY 11554
|
Search Results as of:
05/20/2024 07:00 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
