Patent Assignment Details
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| Reel/Frame: | 011351/0108 | |
| Pages: | 3 |
| | Recorded: | 12/11/2000 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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09044927
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Filing Dt:
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03/20/1998
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Title:
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GATE ARRAY AND MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT USING GATE ARRAY
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Assignee
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| CHIYODA-KU |
| 2-3, MARUNOUCHI 2-CHOME |
| TOKYO 100, JAPAN |
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Correspondence name and address
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OBLON, SPIVAK, MCCLELLAND, MAIER, ET AL
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JOSEPH A. SCAFETTA, JR.
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FOURTH FLOOR
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1755 JEFFERSON DAVIS HIGHWAY
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ARLINGTON, VIRGINIA 22202
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