Patent Assignment Details
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| Reel/Frame: | 011656/0058 | |
| Pages: | 3 |
| | Recorded: | 03/27/2001 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09817275
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Filing Dt:
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03/27/2001
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Publication #:
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Pub Dt:
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08/02/2001
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Title:
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SEMICONDUCTOR DEVICE MANUFACTURING METHOD PERMITTING SUPPRESSION OF LEAK CURRENT THROUGH THE PN JUNCTION
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Assignee
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| 72 HORIKAWA-CHO, SAIWAI-KU |
| KAWASAKI-SHI, JAPAN |
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Correspondence name and address
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FINNEGAN, HENDERSON, FARABOW ET AL.
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MR. ERNEST F. CHAPMAN
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1300 I STREET, N.W.
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WASHINGTON, DC 20005-3315
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