Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 011863/0526 | |
| Pages: | 7 |
| | Recorded: | 06/04/2001 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09752919
|
Filing Dt:
|
01/02/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/13/2001
| | | | |
|
Title:
|
Integrated circuit configuration, method for producing it, and wafer including integrated circuit configurations
|
|
|
Assignee
|
|
|
|
|
| ZT GG VM |
| POSTFACH 22 16 34 |
| MUNCHEN, GERMANY 80506 |
|
|
Correspondence name and address
|
| |
LERNER AND GREENBERG, P.A.
|
| |
RALPH E. LOCHER
|
| |
P.O. BOX 2480
|
| |
HOLLYWOOD, FL 33022
|
Search Results as of:
05/08/2024 09:56 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
