Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 011871/0087 | |
| Pages: | 6 |
| | Recorded: | 06/07/2001 | | |
| Conveyance: | MERGER (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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08773136
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Filing Dt:
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12/26/1996
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Title:
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CONTROLLED PMOS LOAD ON A CMOS PLA
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Patent #:
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Issue Dt:
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04/21/1998
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Application #:
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08773393
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Filing Dt:
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12/26/1996
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Title:
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REDUNDANCY SCHEME FOR SEMICONDUCTOR RAMS
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Patent #:
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Issue Dt:
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09/21/1999
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Application #:
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08773394
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Filing Dt:
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12/26/1996
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Title:
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AUTOMATICALLY ADJUSTING THE DYNAMIC RANGE OF THE VCO IN A PLL AT START-UP FOR OPTIMAL OPERATING POINT
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Patent #:
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Issue Dt:
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06/20/2000
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Application #:
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08774965
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Filing Dt:
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12/26/1996
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Title:
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METHODS AND APPARATUS FOR TRUE LEAST RECENTLY USED (LRU) BIT ENCODING FOR MULTI-WAY ASSOCIATIVE CACHES
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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08967194
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Filing Dt:
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10/29/1997
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Title:
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FAST SRAM DESIGN USING EMBEDDED SENSE AMPS
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Assignee
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| 1194 N. MATHILDA AVE. |
| SUNNYVALE, CALIFORNIA 94089 |
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Correspondence name and address
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JUNIPER NETWORKS, INC.
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ALLEN M. LO
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1194 MATHILDA AVE.
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SUNNYVALE, CA 94089
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