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Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	012506/0534			Pages:	24
		Recorded:	12/31/2001
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 34

Patent #:	5239510	Issue Dt:	08/24/1993	Application #:	07797648	Filing Dt:	11/25/1991
Title:	MULTIPLE VOLTAGE SUPPLIES FOR FIELD PROGRAMMABLE GATE ARRAYS AND THE LIKE

Patent #:	5384497	Issue Dt:	01/24/1995	Application #:	07971501	Filing Dt:	11/04/1992
Title:	LOW-SKEW SIGNAL ROUTING IN A PROGRAMMABLE ARRAY

Patent #:	5396126	Issue Dt:	03/07/1995	Application #:	08019963	Filing Dt:	02/19/1993
Title:	FPGA WITH DISTRIBUTED SWITCH MATRIX

Patent #:	5311080	Issue Dt:	05/10/1994	Application #:	08037766	Filing Dt:	03/26/1993
Title:	FIELD PROGRAMMABLE GATE ARRAY WITH DIRECT INPUT/OUTPUT CONNECTION

Patent #:	5381058	Issue Dt:	01/10/1995	Application #:	08065823	Filing Dt:	05/21/1993
Title:	FPGA HAVING PFU WITH PROGRAMMABLE OUTPUT DRIVER INPUTS

Patent #:	5386156	Issue Dt:	01/31/1995	Application #:	08113154	Filing Dt:	08/27/1993
Title:	PROGRAMMABLE FUNCTION UNIT WITH PROGRAMMABLE FAST RIPPLE LOGIC

Patent #:	5394031	Issue Dt:	02/28/1995	Application #:	08163952	Filing Dt:	12/08/1993
Title:	APPARATUS AND METHOD TO IMPROVE PROGRAMMING SPEED OF FIELD PROGRAMMABLE GATE ARRAYS

Patent #:	5442306	Issue Dt:	08/15/1995	Application #:	08304013	Filing Dt:	09/09/1994
Title:	FIELD PROGRAMMABLE GATE ARRAY USING LOOK-UPTABLES, MULTIPLEXERS AND DECODERS

Patent #:	5594657	Issue Dt:	01/14/1997	Application #:	08473620	Filing Dt:	06/07/1995
Title:	SYSTEM FOR SYNTHESIZING FIELD PROGRAMMABLE GATE ARRAY IMPLEMENTATIONS FROM HIGH LEVEL CIRCUIT DESCRIPTIONS

Patent #:	5526278	Issue Dt:	06/11/1996	Application #:	08492604	Filing Dt:	06/20/1995
Title:	METHOD AND APPARATUS FOR CONVERTING FIELD-PROGRAMMABLE GATE ARRAY IMPLEMENTATIONS INTO MAS-PROGRAMMABLE LOGIC CELL IMPLEMENTATIONS

Patent #:	5570039	Issue Dt:	10/29/1996	Application #:	08507893	Filing Dt:	07/27/1995
Title:	PROGRAMMABLE FUNCTION UNIT AS PARALLEL MULTIPLIER CELL

Patent #:	5559450	Issue Dt:	09/24/1996	Application #:	08507957	Filing Dt:	07/27/1995
Title:	FIELD PROGRAMMABLE GATE ARRAY WITH MULTI-PORT RAM

Patent #:	5528170	Issue Dt:	06/18/1996	Application #:	08535362	Filing Dt:	09/28/1995
Title:	LOW-SKEW SIGNAL ROUTING IN A PROGRAMMABLE ARRAY

Patent #:	5623217	Issue Dt:	04/22/1997	Application #:	08606702	Filing Dt:	02/26/1996
Title:	FIELD PROGRAMMABLE GATE ARRAY WITH WRITE-PORT ENABLED MEMORY

Patent #:	5862365	Issue Dt:	01/19/1999	Application #:	08710445	Filing Dt:	09/17/1996
Title:	CONFIGURATION PIN EMULATION CIRCUIT FOR A FIELD PROGRAMMABLE GATE ARRAY

Patent #:	5991907	Issue Dt:	11/23/1999	Application #:	08729117	Filing Dt:	10/11/1996
Title:	METHOD FOR TESTING FIELD PROGRAMMABLE GATE ARRAYS

Patent #:	5892962	Issue Dt:	04/06/1999	Application #:	08748041	Filing Dt:	11/12/1996
Title:	FPGA-BASED PROCESSOR

Patent #:	6028993	Issue Dt:	02/22/2000	Application #:	08781882	Filing Dt:	01/10/1997
Title:	TIMED CIRCUIT SIMULATION IN HARDWARE USING FPGA'S

Patent #:	6028447	Issue Dt:	02/22/2000	Application #:	08899428	Filing Dt:	07/24/1997
Title:	FPGA HAVING PREDICTABLE OPEN-DRAIN DRIVE MODE

Patent #:	6020755	Issue Dt:	02/01/2000	Application #:	08938550	Filing Dt:	09/26/1997
Title:	HYBRID PROGRAMMABLE GATE ARRAYS

Patent #:	6028463	Issue Dt:	02/22/2000	Application #:	08949992	Filing Dt:	10/15/1997
Title:	PROGRAMMABLE CLOCK MANAGER FOR A PROGRAMMABLE LOGIC DEVICE THAT CAN GENERATE AT LEAST TWO DIFFERENT OUTPUT CLOCKS

Patent #:	6216191	Issue Dt:	04/10/2001	Application #:	08950444	Filing Dt:	10/15/1997
Title:	FIELD PROGRAMMABLE GATE ARRAY HAVING A DEDICATED PROCESSOR INTERFACE

Patent #:	5986471	Issue Dt:	11/16/1999	Application #:	08950446	Filing Dt:	10/15/1997
Title:	BI-DIRECTIONAL BUFFERS AND SUPPLEMENTAL LOGIC AND INTERCONNECT CELLS FOR PROGRAMMABLE LOGIC DEVICES

Patent #:	6060902	Issue Dt:	05/09/2000	Application #:	08950448	Filing Dt:	10/15/1997
Title:	PROGRAMMABLE CLOCK MANAGER FOR A PROGRAMMABLE LOGIC DEVICE THAT CAN BE PROGRAMMED WITHOUT RECONFIGURING THE DEVICE

Patent #:	6049224	Issue Dt:	04/11/2000	Application #:	08950624	Filing Dt:	10/15/1997
Title:	PROGRAMMABLE LOGIC DEVICE WITH LOGIC CELLS HAVING A FLEXIBLE INPUT STRUCTURE

Patent #:	6043677	Issue Dt:	03/28/2000	Application #:	08951128	Filing Dt:	10/15/1997
Title:	PROGRAMMABLE CLOCK MANAGER FOR A PROGRAMMABLE LOGIC DEVICE THAT CAN IMPLEMENT DELAY-LOCKED LOOP FUNCTIONS

Patent #:	6003150	Issue Dt:	12/14/1999	Application #:	08974799	Filing Dt:	11/20/1997
Title:	METHOD FOR TESTING FIELD PROGRAMMABLE GATE ARRAYS

Patent #:	6034538	Issue Dt:	03/07/2000	Application #:	09010000	Filing Dt:	01/21/1998
Title:	VIRTUAL LOGIC SYSTEM FOR RECONFIGURABLE HARDWARE

Patent #:	6064225	Issue Dt:	05/16/2000	Application #:	09045128	Filing Dt:	03/20/1998
Title:	GLOBAL SIGNAL DISTRIBUTION WITH REDUCED ROUTING TRACKS IN AN FPGA

Patent #:	6108806	Issue Dt:	08/22/2000	Application #:	09059552	Filing Dt:	04/13/1998
Title:	METHOD OF TESTING AND DIAGNOSING FIELD PROGRAMMABLE GATE ARRAYS

Patent #:	6002610	Issue Dt:	12/14/1999	Application #:	09069768	Filing Dt:	04/30/1998
Title:	NON-VOLATILE MEMORY ELEMENT FOR PROGRAMMABLE LOGIC APPLICATIONS AND OPERATIONAL METHODS THEREFOR

Patent #:	6202182	Issue Dt:	03/13/2001	Application #:	09109123	Filing Dt:	06/30/1998
Title:	METHOD AND APPARATUS FOR TESTING FIELD PROGRAMMABLE GATE ARRAYS

Patent #:	6124732	Issue Dt:	09/26/2000	Application #:	09115683	Filing Dt:	07/15/1998
Title:	SIGNALING VOLTAGE RANGE DISCRIMINATOR

Patent #:	6137738	Issue Dt:	10/24/2000	Application #:	09452017	Filing Dt:	11/30/1999
Title:	METHOD FOR IN-SYSTEM PROGRAMMING OF SERIALLY CONFIGURED EEPROMS USING A JTAG INTERFACE OF A FIELD PROGRAMMABLE GATE ARRAY

Assignor

LUCENT TECHNOLOGIES INC.

Exec Dt:

01/31/2001

Assignee

AGERE SYSTEMS GUARDIAN CORP.

9333 S. JOHN YOUNG PARKWAY

ORLANDO, FLORIDA 32819

Correspondence name and address
	AGERE SYSTEMS INC.
	ANTHONY GRILLO
	P.O. BOX 614
	BERKELEY HEIGHTS, NJ 07922-0614

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