Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 012536/0213 | |
| Pages: | 3 |
| | Recorded: | 01/09/2002 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10042548
|
Filing Dt:
|
01/09/2002
|
|
Title:
|
METHOD AND APPARATUS FOR TESTING A SYSTEM ON A CHIP (SOC) INTEGRATED CIRCUIT COMPRISING A HARD DISK CONTROLLER AND READ CHANNEL
|
|
|
Assignee
|
|
|
|
|
| 4TH FLOOR WINDSOR PLACE |
| 22 QUEEN STREET |
| HAMILTON HM 1179, BERMUDA |
|
|
Correspondence name and address
|
| |
MARVELL SEMICONDUCTOR, INC.
|
| |
ERIC B. JANOFSKY
|
| |
PATENT DEPARTMENT
|
| |
645 ALMANOR AVENUE
|
| |
SUNNYVALE, CA 94085
|
Search Results as of:
05/13/2024 04:27 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
