Patent Assignment Details
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| Reel/Frame: | 012927/0922 | |
| Pages: | 5 |
| | Recorded: | 05/24/2002 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10153595
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Filing Dt:
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05/24/2002
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Publication #:
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Pub Dt:
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01/02/2003
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Title:
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Method and apparatus for determining optimum size of LSI chip
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Assignees
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| 2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU |
| TOKYO 100-8310, JAPAN |
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| 1-17, CHUO 3-CHOME ITAMI-SHI |
| HYOGO 664-0851, JAPAN |
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Correspondence name and address
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BURNS, DOANE, SWECKER & MATHIS, L.L.P.
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PLATON N. MANDROS
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P.O. BOX 1404
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ALEXANDRIA, VA 22313-1401
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