Patent Assignment Details
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| Reel/Frame: | 012935/0023 | |
| Pages: | 2 |
| | Recorded: | 05/22/2002 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10151826
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Filing Dt:
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05/22/2002
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Publication #:
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Pub Dt:
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11/27/2003
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Title:
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CHIP DESIGN METHOD FOR DESIGNING INTEGRATED CIRCUIT CHIPS WITH EMBEDDED MEMORIES
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Assignee
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| 1551 MCCARTHY BOULEVARD |
| MILPITAS, CALIFORNIA 95035 |
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Correspondence name and address
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LSI LOGIC CORPORATION
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CHARLES W. PETERSON, JR.
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1551 MCCARTHY BLVD.
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MILPITAS, CA 95035
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