Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 013127/0460 | |
| Pages: | 4 |
| | Recorded: | 07/24/2002 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09281630
|
Filing Dt:
|
03/30/1999
|
|
Title:
|
MEMORY, INTERFACE SYSTEM AND METHOD FOR MAPPING LOGICAL BLOCK NUMBERS TO PHYSICAL SECTOR NUMBERS IN A FLASH MEMORY HAVING AN ERASE BLOCK SIZE LARGER THAN A WRITE BLOCK SIZE, USING A MASTER INDEX TABLE AND A TABLE OF PHYSICAL SECTOR NUMBERS
|
|
|
Assignee
|
|
|
|
|
| 1171 SONORA COURT |
| SUNNYVALE, CALIFORNIA 95086 |
|
|
Correspondence name and address
|
| |
GRAY CARY WARE, ET AL.
|
| |
RONALD L. YIN
|
| |
1755 EMBARCADERO ROAD
|
| |
PALO ALTO, CA 94303-3340
|
Search Results as of:
05/11/2024 02:53 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
