Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 013650/0079 | |
| Pages: | 10 |
| | Recorded: | 05/13/2003 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
8
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09389496
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Filing Dt:
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09/03/1999
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Publication #:
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Pub Dt:
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02/28/2002
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Title:
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MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09618099
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Filing Dt:
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07/17/2000
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Title:
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METHOD OF MAKING A SHADOW MASK FOR A CATHODE RAY TUBE
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09640180
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Filing Dt:
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08/17/2000
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Title:
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SEMICONDUCTOR MEMORY APPARATUS WHICH CAN EASILY ATTAIN REDUCTION OF ACCESS TIME
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09644695
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Filing Dt:
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08/24/2000
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Title:
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CCD MOLD PACKAGE WITH IMPROVED HEAT RADIATION STRUCTURE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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09725120
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Filing Dt:
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11/29/2000
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Publication #:
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Pub Dt:
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05/31/2001
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Title:
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Resin-encapsulated semiconductor device and method of forming the same
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09739890
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Filing Dt:
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12/20/2000
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Publication #:
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Pub Dt:
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06/07/2001
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Title:
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WIRING SUBSTRATE, MULTI-LAYERED WIRING SUBSTRATE AND METHOD OF FABRICATING THOSE
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09938662
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Filing Dt:
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08/27/2001
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Publication #:
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Pub Dt:
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02/28/2002
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Title:
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WAFER INSPECTION DEVICE AND WAFER INSPECTION METHOD
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09968003
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Filing Dt:
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10/02/2001
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Publication #:
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Pub Dt:
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03/07/2002
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Title:
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BIASING CIRCUIT FOR QUICKLY OUTPUTTING STABLE BIAS OUTPUT AND SEMICONDUCTOR MEMORY DEVICE
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Assignee
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1753 SHIMONUMABE NAKAHARA-KU, KAWASAKI |
KANAGAWA 211-8668, JAPAN |
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Correspondence name and address
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YOUNG & THOMPSON
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ROLAND E. LONG, JR.
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745 SOUTH 23RD STREET
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SECOND FLOOR
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ARLINGTON, VA 22202
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