Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 013990/0650 | |
| Pages: | 6 |
| | Recorded: | 04/24/2003 | | |
| Conveyance: | DOCUMENT PREVIOUSLY RECORDED AT REEL 013547 FRAME 0676 CONTAINS AN ERROR IN ASSIGNEE. DOCUMENT RE-RECORDED TO CORRECT ERROR ON STATED REEL. |
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Total properties:
1
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10307189
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Filing Dt:
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11/29/2002
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Title:
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MEMORY WITH IMPROVED CHARGE-TRAPPING DIELECTRIC LAYER
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Assignees
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| ONE AMD PLACE |
| SUNNYVALE, CALIFORNIA |
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| 1-1 KAMIKODANAKA 4-CHOME |
| NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA-KEN, JAPAN |
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Correspondence name and address
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THE LAW OFFICES OF MIKIO ISHIMARU
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MIKIO ISHIMARU
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1110 SUNNYVALE-SARATOGA RD.
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SUITE A1
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SUNNYVALE, CA 94087
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