Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 014066/0082 | |
| Pages: | 5 |
| | Recorded: | 10/22/2003 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
5
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/1991
|
Application #:
|
07354268
|
Filing Dt:
|
05/19/1989
|
|
Title:
|
CAD DRIVEN MICROPROBE INTEGRATED CIRCUIT TESTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/1991
|
Application #:
|
07527661
|
Filing Dt:
|
05/21/1990
|
|
Title:
|
CONTACT SENSING FOR INTEGRATED CIRCUIT TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1992
|
Application #:
|
07644231
|
Filing Dt:
|
01/22/1991
|
|
Title:
|
PROGRAMMABLE ANTIFUSE STRUCTURE, PROCESS, LOGIC CELL AND ARCHITECTURE FOR PROGRAMMABLE INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
08994996
|
Filing Dt:
|
12/19/1997
|
|
Title:
|
A METHOD OF AUTOMATING THE MANIPULATION AND DISPLAY OF SETS OF WAFER YIELD DATA USING A USER INTERFACE SMART MACRO.
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2001
|
Application #:
|
09192164
|
Filing Dt:
|
11/13/1998
|
|
Title:
|
IC TEST SOFTWARE SYSTEM FOR MAPPING LOGICAL FUNCTIONAL TEST DATA OF LOGIC INTEGRATED CIRCUITS TO PHYSICAL REPRESENTATION
|
|
|
Assignee
|
|
|
|
|
| 5350 NE DAWSON CREEK DRIVE |
| HILLSBORO, OREGON 97124-5793 |
|
|
Correspondence name and address
|
| |
MICHAEL O. SCHEINBERG
|
| |
PO BOX 164140
|
| |
AUSTIN, TX 78716-4140
|
Search Results as of:
05/08/2024 04:01 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
