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Patent #:
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Issue Dt:
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05/19/1987
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Application #:
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06437399
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Filing Dt:
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10/28/1982
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Title:
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MULTIPROCESSOR MULTISYSTEM COMMUNICATIONS NETWORK
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Patent #:
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Issue Dt:
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03/04/1986
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Application #:
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06537038
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Filing Dt:
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09/29/1983
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Title:
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ENTRY CONTROL STORE FOR ENHANCED C P U PIPELINE PERFORMANCE
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Patent #:
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Issue Dt:
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06/23/1987
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Application #:
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06537039
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Filing Dt:
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09/29/1983
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Title:
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RAM BASED MULTIPLE BREAKPOINT LOGIC
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Patent #:
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Issue Dt:
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10/21/1986
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Application #:
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06537041
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Filing Dt:
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09/29/1983
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Title:
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METHOD OF OPERATING ENHANCED ALU TEST HARDWARE
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Patent #:
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Issue Dt:
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01/24/1989
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Application #:
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06537877
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Filing Dt:
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09/29/1983
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Title:
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MULTIPLE DATA PATCH CPU ARCHITECTURE
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Patent #:
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Issue Dt:
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02/18/1986
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Application #:
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06537886
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Filing Dt:
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09/29/1983
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Title:
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ENHANCED CPU MICROBRANCHING ARCHITECTURE
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Patent #:
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Issue Dt:
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05/05/1987
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Application #:
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06542187
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Filing Dt:
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10/14/1983
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Title:
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MULTIPROCESSOR MULTISYSTEM COMMUNICATIONS NETWORK
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Patent #:
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Issue Dt:
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05/19/1987
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Application #:
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06551278
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Filing Dt:
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11/14/1983
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Title:
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INPUT-OUTPUT MULTIPLEXER-DEMULTIPLEXER COMMUNICATIONS CHANNEL
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Patent #:
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Issue Dt:
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11/04/1986
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Application #:
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06551280
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Filing Dt:
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11/14/1983
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Title:
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PARALLEL GROUNDING SCHEME
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Patent #:
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Issue Dt:
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08/19/1986
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Application #:
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06551283
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Filing Dt:
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11/14/1983
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Title:
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FAULT-TOLERANT COMMUNICATIONS CONTROLLER SYSTEM
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Patent #:
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Issue Dt:
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02/24/1987
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Application #:
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06551297
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Filing Dt:
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11/14/1983
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Title:
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COMMUNICATIONS METHOD
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Patent #:
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Issue Dt:
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02/04/1986
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Application #:
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06551299
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Filing Dt:
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11/14/1983
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Title:
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CONSTANT CURRENT DRIVE FOR SWITCHING POWER SUPPLY
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Patent #:
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Issue Dt:
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12/09/1986
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Application #:
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06551300
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Filing Dt:
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11/14/1983
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Title:
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VECTOR INTERRUPT SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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07/28/1987
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Application #:
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06632236
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Filing Dt:
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07/19/1984
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Title:
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DRIVER CIRCUIT FOR A THREE-STATE GATE ARRAY USING LOW DRIVING CURRENT
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Patent #:
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Issue Dt:
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03/17/1987
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Application #:
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06689395
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Filing Dt:
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01/07/1985
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Title:
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STRUCTURAL SUPPORT AND THIN PANEL ASSEMBLY
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Patent #:
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Issue Dt:
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04/22/1986
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Application #:
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06702185
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Filing Dt:
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02/15/1985
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Title:
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ELECTRONIC MODULE WITH FAIL-SAFE POWER DISCONNECT
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Patent #:
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Issue Dt:
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11/20/1990
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Application #:
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06712579
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Filing Dt:
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03/15/1985
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Title:
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METHOD AND APPARATUS FOR CHANGING THE MASTER KEY IN A CRYPTOGRAPHIC SYSTEM
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Patent #:
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Issue Dt:
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10/13/1987
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Application #:
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06733293
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Filing Dt:
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05/10/1985
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Title:
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SELF-CHECKING, DUAL RAILED, LEADING EDGE SYNCHRONIZER
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Patent #:
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Issue Dt:
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01/05/1988
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Application #:
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06741659
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Filing Dt:
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06/05/1985
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Title:
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METHOD FOR MULTIPROCESSOR COMMUNICATIONS
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Patent #:
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Issue Dt:
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04/28/1987
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Application #:
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06791240
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Filing Dt:
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10/25/1985
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Title:
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METHOD FOR FORMING VERTICAL INTERCONNECTS IN POLYIMIDE INSULATING LAYERS
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Patent #:
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Issue Dt:
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01/20/1987
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Application #:
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06805497
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Filing Dt:
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12/05/1985
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Title:
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BASE DRIVE CIRCUIT FOR HIGH-POWER SWITCHING TRANSISTOR
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Patent #:
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Issue Dt:
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01/24/1989
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Application #:
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06805510
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Filing Dt:
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12/05/1985
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Title:
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CIRCUIT BOARD BARRIER GUIDE
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Patent #:
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Issue Dt:
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06/06/1989
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Application #:
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06839742
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Filing Dt:
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03/13/1986
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Title:
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INSTRUCTION SEQUENCER BRANCH MECHANISM
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Patent #:
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Issue Dt:
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02/28/1989
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Application #:
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06844911
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Filing Dt:
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03/26/1986
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Title:
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PROCESSOR CONTROLLED MODIFYING OF TABLED INPUT/OUTPUT PRIORITY
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Patent #:
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Issue Dt:
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05/24/1988
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Application #:
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06845280
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Filing Dt:
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03/28/1986
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Title:
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METHOD AND APPARATUS FOR CLOCK MANAGEMENT
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Patent #:
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Issue Dt:
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06/28/1988
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Application #:
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06845738
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Filing Dt:
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03/28/1986
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Title:
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OVERLAPPED CONTROL STORE
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Patent #:
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Issue Dt:
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12/19/1989
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Application #:
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06845906
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Filing Dt:
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03/28/1986
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Title:
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MULTIPROCESSOR BUS PROTOCOL
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Patent #:
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Issue Dt:
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06/28/1988
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Application #:
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06853537
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Filing Dt:
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04/18/1986
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Title:
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FAULT TOLERANT MODULAR SUBSYSTEMS FOR COMPUTERS
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Patent #:
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Issue Dt:
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08/20/1991
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Application #:
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06889439
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Filing Dt:
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07/23/1986
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Title:
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DELAY REGULATION CIRCUIT
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Patent #:
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Issue Dt:
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09/06/1988
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Application #:
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06912490
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Filing Dt:
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09/26/1986
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Title:
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PULSE LENGTH INDICATOR
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Patent #:
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Issue Dt:
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03/01/1988
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Application #:
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06942669
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Filing Dt:
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12/17/1986
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Title:
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EMITTER FUNCTION LOGIC WITH CONCURRENT, COMPLEMENTARY OUTPUTS
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Patent #:
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Issue Dt:
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04/25/1989
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Application #:
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07031477
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Filing Dt:
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03/27/1987
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Title:
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MICROCODED MICROPROCESSOR WITH SHARED RAM
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Patent #:
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Issue Dt:
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04/04/1989
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Application #:
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07031486
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Filing Dt:
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03/27/1987
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Title:
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SYSTEM FOR PERFORMING GROUP RELATIVE ADDRESSING
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Patent #:
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Issue Dt:
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02/06/1990
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Application #:
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07036607
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Filing Dt:
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04/10/1987
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Title:
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STACK WITH UNARY ENCODED STACK POINTER
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Patent #:
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Issue Dt:
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04/02/1991
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Application #:
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07036726
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Filing Dt:
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04/10/1987
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Title:
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METHOD AND APPARATUS FOR MODIFYING MICRO-INSTRUCTIONS USING A MACRO- INSTRUCTION PIPELINE
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Patent #:
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Issue Dt:
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05/02/1989
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Application #:
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07039548
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Filing Dt:
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04/16/1987
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Title:
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SCAN TEST APPARATUS FOR DIGITAL SYSTEMS HAVING DYNAMIC RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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08/02/1988
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Application #:
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07039562
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Filing Dt:
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04/16/1987
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Title:
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FAULT TOLERANT/FAILSAFE CURRENT UNIT
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Patent #:
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Issue Dt:
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06/27/1989
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Application #:
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07039565
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Filing Dt:
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04/16/1987
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Title:
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CROSS-COUPLED CHECKING CIRCUIT
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Patent #:
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Issue Dt:
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01/24/1989
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Application #:
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07040454
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Filing Dt:
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04/17/1987
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Title:
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ELECTRICAL KEYING FOR REPLACEABLE MODULES
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Patent #:
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Issue Dt:
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10/25/1988
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Application #:
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07040466
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Filing Dt:
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04/20/1987
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Title:
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DIAGNOSTIC APPARATUS FOR A DATA PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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04/11/1989
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Application #:
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07040513
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Filing Dt:
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04/17/1987
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Title:
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INPUT/OUTPUT SYSTEM FOR MULTIPROCESSORS
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Patent #:
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Issue Dt:
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10/11/1988
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Application #:
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07065233
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Filing Dt:
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06/22/1987
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Title:
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APPARATUS FOR CONTROLLING THE CONNECTION OF AN ELECTRICAL MODULE TO AN ELECTRICAL RECEPTACLE
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Patent #:
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Issue Dt:
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01/12/1993
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Application #:
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07068699
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Filing Dt:
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06/30/1987
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Title:
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QUEUE SYSTEM WITH UNINTERRUPTED TRANSFER OF DATA THROUGH INTERMEDIATE LOCATIONS TO SELECTED QUEUE LOCATION
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Patent #:
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Issue Dt:
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03/20/1990
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Application #:
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07072811
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Filing Dt:
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07/10/1987
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Title:
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SYSTEM FOR MEASURING PROGRAM EXECUTION BY REPLACING AN EXECUTABLE INSTRUCTION WITH INTERRUPT CAUSING INSTRUCTION
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Patent #:
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Issue Dt:
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02/06/1990
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Application #:
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07076458
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Filing Dt:
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07/22/1987
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Title:
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ELECTRONIC MODULE INTERCONNECTION SYSTEM
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Patent #:
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Issue Dt:
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02/21/1989
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Application #:
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07123507
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Filing Dt:
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11/20/1987
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Title:
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TTL-TO-ECL INPUT TRANSLATOR/DRIVER CIRCUIT
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Patent #:
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Issue Dt:
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07/04/1989
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Application #:
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07126525
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Filing Dt:
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11/30/1987
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Title:
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STATE MACHINE CHECKER
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Patent #:
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Issue Dt:
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10/03/1989
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Application #:
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07126806
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Filing Dt:
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11/30/1987
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Title:
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PARITY REGENERATION SELF-CHECKING
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Patent #:
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Issue Dt:
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05/02/1989
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Application #:
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07126812
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Filing Dt:
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11/30/1987
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Title:
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DATA INTEGRITY CHECKING WITH FAULT TOLERANCE
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Patent #:
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Issue Dt:
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10/24/1989
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Application #:
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07126971
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Filing Dt:
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11/30/1987
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Title:
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SYNCHRONIZATION FAILURE DETECTION
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Patent #:
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Issue Dt:
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04/11/1989
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Application #:
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07126997
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Filing Dt:
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11/30/1987
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Title:
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TWO-STAGE SYNCHRONIZER
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Patent #:
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Issue Dt:
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11/07/1989
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Application #:
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07126998
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Filing Dt:
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11/30/1987
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Title:
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SCAN DATA PATH COUPLING
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Patent #:
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Issue Dt:
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03/27/1990
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Application #:
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07183190
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Filing Dt:
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04/26/1988
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Title:
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VERSION MANAGEMENT TOOL
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Patent #:
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Issue Dt:
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09/05/1989
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Application #:
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07209672
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Filing Dt:
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06/21/1988
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Title:
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SCSI CONVERTER
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Patent #:
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Issue Dt:
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12/05/1989
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Application #:
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07238006
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Filing Dt:
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08/29/1988
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Title:
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ELECTRONIC MODULE INTERLOCK AND EXTRACTION MECHANISM
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Patent #:
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Issue Dt:
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08/21/1990
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Application #:
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07268422
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Filing Dt:
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11/08/1988
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Title:
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A 2:1 VOLTAGE MATRIX ENCODED I/O TRANSMISSION SYSTEM
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Patent #:
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Issue Dt:
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07/23/1991
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Application #:
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07268423
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Filing Dt:
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11/08/1988
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Title:
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N:1 TIME-VOLTAGE MATRIX ENCODED I/O TRANSMISSION SYSTEM
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Patent #:
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Issue Dt:
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10/23/1990
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Application #:
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07283573
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Filing Dt:
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12/13/1988
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Title:
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MULTIPLE PROCESSOR SYSTEM HAVING SHARED MEMORY WITH PRIVATE-WRITE CAPABILITY
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Patent #:
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Issue Dt:
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03/27/1990
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Application #:
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07295333
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Filing Dt:
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01/10/1989
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Title:
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INSERTION/EXTRACTION MECHANISM FOR BLIND PLUGGABLE MODULES
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Patent #:
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Issue Dt:
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06/05/1990
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Application #:
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07318435
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Filing Dt:
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03/03/1989
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Title:
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TRUE TTL TO TRUE ECL BI-DIRECTIONAL TRISTATABLE TRANSLATOR DRIVER CIRCUIT
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Patent #:
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Issue Dt:
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06/12/1990
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Application #:
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07323485
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Filing Dt:
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03/14/1989
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Title:
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METHOD FOR ENCRYPTING TRANSMITTED DATA USING A UNIQUE KEY
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Patent #:
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Issue Dt:
|
06/05/1990
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Application #:
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07331403
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Filing Dt:
|
03/30/1989
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Title:
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ELECTRIC MODULE LATCH ASSEMBLY
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Patent #:
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Issue Dt:
|
03/05/1991
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Application #:
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07331467
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Filing Dt:
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03/31/1989
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Title:
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LOOPBACK TESTER FOR TESTING FIELD REPLACEABLE UNITS
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Patent #:
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Issue Dt:
|
04/13/1993
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Application #:
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07346203
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Filing Dt:
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05/02/1989
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Title:
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CELL STRUCTURE FOR LINEAR ARRAY WAFER SCALE INTEGRATIONS WITH CAPABILITY TO OPEN BOUNDARY I/O BUS WITHOUT NEIGHBOR ACKNOWLEDGEMENT
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Patent #:
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Issue Dt:
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11/19/1991
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Application #:
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07353717
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Filing Dt:
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05/18/1989
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Title:
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ONE OUT OF N CHECKING APPARATUS AND METHOD
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Patent #:
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Issue Dt:
|
12/10/1991
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Application #:
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07356316
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Filing Dt:
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05/24/1989
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Title:
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METHOD AND APPARATUS FOR RECOVERING FROM AN INCORRECT BRANCH PREDICTION IN A PROCESSOR THAT EXECUTES A FAMILY OF INSTRUCTIONS IN PARALLEL
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Patent #:
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Issue Dt:
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12/24/1991
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Application #:
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07357238
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Filing Dt:
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05/24/1989
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Title:
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PAIRED INSTRUCTION PROCESSOR PRECISE EXCEPTION HANDLING MECHANISM
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Patent #:
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Issue Dt:
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07/12/1994
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Application #:
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07375428
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Filing Dt:
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07/03/1989
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Title:
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APPARATUS AND METHOD FOR READING, WRITING, AND REFRESHING MEMORY WITH DIRECT VIRTUAL OR PHYSICAL ACCESS
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Patent #:
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Issue Dt:
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05/14/1991
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Application #:
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07377982
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Filing Dt:
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07/11/1989
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Title:
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DEFERRED COMPARISON MULTIPLIER CHECKER
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Patent #:
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Issue Dt:
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07/30/1991
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Application #:
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07385330
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Filing Dt:
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07/25/1989
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Title:
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MULTIPLE POWER SUPPLY SENSOR FOR PROTECTING SHARED PROCESSOR BUSES
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Patent #:
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Issue Dt:
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11/26/1991
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Application #:
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07406012
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Filing Dt:
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09/12/1989
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Title:
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ERROR DETECTION FOR FIBER DISTRIBUTED INTERFACED OPTIC LINK
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Patent #:
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Issue Dt:
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03/31/1992
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Application #:
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07440538
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Filing Dt:
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11/22/1989
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Title:
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SYSTEM FOR PROTECTING A DC POWER DISTRIBUTION BUS DURING HOT SERVICING
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Patent #:
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Issue Dt:
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03/26/1991
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Application #:
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07440967
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Filing Dt:
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11/22/1989
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Title:
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APPARATUS FOR A BALANCED THREE PHASE AC POWER SUPPLY IN A COMPUTER HAVING VARIABLE DC LOADS
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Patent #:
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Issue Dt:
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03/15/1994
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Application #:
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07461250
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Filing Dt:
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01/05/1990
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Title:
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FALUT-TOLERANT COMPUTER SYSTEM WITH ONLINE RECOVERY AND REINTIGRATION OF REDUNDANT COMPONENTS
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Patent #:
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Issue Dt:
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04/13/1993
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Application #:
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07464817
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Filing Dt:
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01/08/1990
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Title:
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MULTI-BOARD SYSTEM HAVING ELECTRONIC KEYING AND PREVENTING POWER TO IMPROPERLY CONNECTED PLUG-IN BOARDS WITH IMPROPERLY CONFIGURED DIODE CONNECTIONS
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Patent #:
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Issue Dt:
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07/30/1991
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Application #:
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07471915
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Filing Dt:
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01/29/1990
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Title:
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SELF-CALIBRATING CLOCK SYNCHRONIZATION SYSTEM
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Patent #:
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Issue Dt:
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11/09/1993
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Application #:
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07514338
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Filing Dt:
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04/24/1990
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Title:
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ELECTRONIC SECURITY MODULE FOR USE IN COMPUTER CONTROLLED SECURITY SYSTEMS
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Patent #:
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Issue Dt:
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02/15/1994
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Application #:
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07570937
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Filing Dt:
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08/22/1990
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Title:
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MEMORY SYSTEM USING LINEAR ARRAY WAFER SCALE INTEGRATION ARCHITECTURE
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Patent #:
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Issue Dt:
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05/03/1994
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Application #:
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07589847
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Filing Dt:
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09/28/1990
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Title:
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SYNCHRONOUS PROCESSOR UNIT WITH INTERCONNECTED, SEPARATELY CLOCKED PROCESSOR SECTIONS WHICH ARE AUTOMATICALLY SYNCHRONIZED FOR DATA TRANSFER OPERATIONS
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Patent #:
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Issue Dt:
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07/21/1992
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Application #:
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07594588
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Filing Dt:
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10/09/1990
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Title:
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SYSTEM FOR CACHE SPACE ALLOCATION USING SELECTIVE ADDRESSING
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Patent #:
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Issue Dt:
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10/19/1993
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Application #:
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07703228
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Filing Dt:
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05/20/1991
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Title:
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APPARATUS FOR INTELLIGENT REDUCTION OF WORST CASE POWER IN MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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05/04/1993
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Application #:
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07726616
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Filing Dt:
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07/08/1991
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Title:
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METHOD AND APPARATUS FOR MOUNTING, COOLING, INTERCONNECTING, AND PROVIDING POWER AND DATA TO A PLURALITY OF ELECTRONIC MODULES
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Patent #:
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Issue Dt:
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04/04/1995
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Application #:
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07735594
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Filing Dt:
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07/25/1991
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Title:
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METHOD AND APPARATUS FOR EXECUTING TASKS BY FOLLOWING A LINKED LIST OF MEMORY PACKETS
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Patent #:
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Issue Dt:
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04/13/1993
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Application #:
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07737862
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Filing Dt:
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07/30/1991
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Title:
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BREAKOUT PANEL CONSTRUCTION
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Patent #:
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Issue Dt:
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03/30/1993
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Application #:
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07743003
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Filing Dt:
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08/09/1991
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Title:
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ELECTRONIC MODULE SWITCH AND POWER AND INTERLOCK SYSTEM
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Patent #:
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Issue Dt:
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03/08/1994
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Application #:
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07775634
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Filing Dt:
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10/10/1991
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Title:
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PACKAGING SYSTEM
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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07781422
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Filing Dt:
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10/21/1991
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Title:
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METHOD AND APPARATUS FOR PROVIDING A FAULT TOLERANT NETWORK INTERFACE CONTROLLER
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Patent #:
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Issue Dt:
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01/03/1995
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Application #:
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07797470
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Filing Dt:
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11/25/1991
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Title:
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SYSTEM AND METHOD FOR ENSURING WRITE DATA INTEGRITY IN A REDUNDANT ARRAY DATA STORAGE SYSTEM
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Patent #:
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Issue Dt:
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01/31/1995
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Application #:
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07811190
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Filing Dt:
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12/20/1991
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Title:
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ALIGNMENT MECHANISM FOR BLIND-MATABLE CONNECTION FOR TWO OR MORE CONNECTORS
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Patent #:
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Issue Dt:
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08/23/1994
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Application #:
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07823141
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Filing Dt:
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01/21/1992
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Title:
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REDUNDANT ARRAY PARITY CACHING SYSTEM
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Patent #:
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Issue Dt:
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08/09/1994
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Application #:
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07831951
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Filing Dt:
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02/06/1992
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Title:
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ENVIRONMENT MONITORING SYSTEM FOR STANDARD INTERFACE BUS COMPUTER SYSTEMS
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Patent #:
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Issue Dt:
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06/28/1994
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Application #:
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07881434
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Filing Dt:
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05/11/1992
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Title:
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FAULT TOLERANT POWER SUPPLY FOR AN ARRAY OF STORAGE DEVICES
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Patent #:
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Issue Dt:
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04/04/1995
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Application #:
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07906196
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Filing Dt:
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06/29/1992
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Title:
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FAIL SAFE, FAULT TOLERANT CIRCUIT FOR MANUFACTURING TEST LOGIC ON APPLICATION SPECIFIC INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/26/1994
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Application #:
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07938102
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Filing Dt:
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08/28/1992
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Title:
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METHOD AND SYSTEM FOR IMPLEMENTING REMOTE PROCEDURE CALLS IN A DISTRIBUTED COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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07943221
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Filing Dt:
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09/09/1992
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Title:
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METHOD AND SYSTEM FOR CREATING COMPUTER-PROGRAM-BASED APPLICATIONS WITH DEVELOPER SPECIFIED LOOK AND FEEL
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|
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Patent #:
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Issue Dt:
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06/21/1994
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Application #:
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08006188
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Filing Dt:
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01/19/1993
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Title:
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INJECTOR/EJECTOR LATCH LOCK MECHANISM
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|
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Patent #:
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Issue Dt:
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12/05/1995
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Application #:
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08025229
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Filing Dt:
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03/02/1993
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Title:
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FAULT-TOLERANT COMPUTER SYSTEM WITH HIDDEN LOCAL MEMORY REFRESH
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|
|
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Patent #:
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Issue Dt:
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05/10/1994
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Application #:
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08055405
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Filing Dt:
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04/29/1993
|
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Title:
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ELECTRONIC ASSEMBLY WITH IMPROVED GROUNDING AND EMI SHIELDING
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|
|
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Patent #:
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|
Issue Dt:
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09/13/1994
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Application #:
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08076028
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Filing Dt:
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06/14/1993
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Title:
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FILTERED CONNECTOR/ADAPTOR FOR UNSHIELDED TWISTED PAIR WIRING
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|
|
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Patent #:
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Issue Dt:
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09/14/1999
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Application #:
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08083419
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Filing Dt:
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06/28/1993
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Title:
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SYSTEM AND METHOD FOR PERFORMING IMPROVED PSEUDO-RANDOM TESTING OF SYSTEMS HAVING MULTI DRIVER BUSES
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