Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 014545/0033 | |
| Pages: | 3 |
| | Recorded: | 10/01/2003 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
3
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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10175301
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Filing Dt:
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06/20/2002
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Publication #:
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Pub Dt:
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02/13/2003
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10190480
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Filing Dt:
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07/09/2002
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Publication #:
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Pub Dt:
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03/06/2003
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Title:
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SEMICONDUCTOR MEMORY CIRCUIT
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10360867
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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07/03/2003
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Title:
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METHOD OF TESTING A SEMICONDUCTOR INTEGRATED DEVICE
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Assignee
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| 4-1, MARUNOUCHI 2-CHOME |
| CHIYODA-KU, TOKYO, JAPAN |
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Correspondence name and address
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REED SMITH LLP
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STANLEY P. FISHER
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3110 FAIRVIEW PARK DR.
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SUITE 1400
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FALLS CHURCH, VA 22042
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