Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 015118/0173 | |
| Pages: | 5 |
| | Recorded: | 09/13/2004 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
8
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10057575
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Filing Dt:
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01/25/2002
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Publication #:
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Pub Dt:
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07/31/2003
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Title:
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VERTICAL MIMCAP MANUFACTURING METHOD
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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10406019
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Filing Dt:
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04/02/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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MEMORY DEVICE AND METHOD OF OUTPUTTING DATA FROM A MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/06/2007
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Application #:
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10703100
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Filing Dt:
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11/06/2003
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Publication #:
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Pub Dt:
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05/12/2005
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Title:
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GENERATION OF METAL HOLES BY VIA MUTATION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10766053
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Filing Dt:
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01/28/2004
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Publication #:
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Pub Dt:
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07/28/2005
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Title:
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Method for N+ doping of amorphous silicon and polysilicon electrodes in deep trenches
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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10774827
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Filing Dt:
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02/09/2004
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Publication #:
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Pub Dt:
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08/11/2005
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Title:
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LINE MASK DEFINED ACTIVE AREAS FOR 8F2 DRAM CELLS WITH FOLDED BIT LINES AND DEEP TRENCH PATTERNS
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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10777570
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Filing Dt:
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02/11/2004
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Publication #:
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Pub Dt:
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08/11/2005
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Title:
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FAST UNALIGNED MEMORY ACCESS SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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10777863
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Filing Dt:
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02/11/2004
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Publication #:
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Pub Dt:
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08/11/2005
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Title:
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CONFIGURABLE MEMORY SYSTEM FOR EMBEDDED PROCESSORS
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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10846275
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Filing Dt:
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05/14/2004
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Publication #:
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Pub Dt:
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11/17/2005
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Title:
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SINGLE EXPOSURE OF MASK LEVELS HAVING A LINES AND SPACES ARRAY USING ALTERNATING PHASE-SHIFT MASK
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Assignee
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| ST.-MARTIN-STR. 53 |
| MUNICH, GERMANY 81669 |
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Correspondence name and address
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HEATHER ROWLAND
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3000 CENTREGREEN WAY
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CARY, NC 27513
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