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Patent Assignment Details
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Reel/Frame:015183/0907   Pages: 2
Recorded: 04/06/2004
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
03/21/2006
Application #:
10739117
Filing Dt:
12/19/2003
Publication #:
Pub Dt:
06/23/2005
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING BUILT-IN PLL CIRCUIT
Assignors
1
Exec Dt:
12/16/2003
2
Exec Dt:
12/16/2003
3
Exec Dt:
12/16/2003
4
Exec Dt:
01/05/2004
5
Exec Dt:
01/05/2004
Assignees
1
4-1, MARUNOUCHI 2-CHOME CHIYODA-KU
TOKYO, JAPAN
2
4 SKYLINE DRIVE, SUITE 265
HAWTHORNE, NEW YORK
Correspondence name and address
MATTINGLY, STANGER & MALUR, P.C.
JOHN R. MATTINGLY
1800 DIAGONAL ROAD, SUITE 370
ALEXANDRIA, VIRGINIA 22314

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