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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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10162169
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Filing Dt:
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06/05/2002
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Publication #:
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Pub Dt:
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01/09/2003
| | | | |
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Title:
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A SHARED CONTACT IN A SEMICONDUCTOR DEVICE IN WHICH DRAMS AND SRAMS ARE COMBINED AND METHOD OF MANUFACTURING THE SAME
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|
|
|
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Patent #:
|
|
Issue Dt:
|
12/07/2004
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Application #:
|
10162200
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Filing Dt:
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06/05/2002
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Publication #:
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Pub Dt:
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01/16/2003
| | | | |
|
Title:
|
POWER SUPPLY CONTROL CIRCUIT FOR USE IN SEMICONDUCTOR STORAGE DEVICE
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
10162592
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Filing Dt:
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06/06/2002
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Publication #:
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Pub Dt:
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03/13/2003
| | | | |
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Title:
|
Semiconductor polishing apparatus and method of detecting end point of polishing semiconductor
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|
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Patent #:
|
|
Issue Dt:
|
04/27/2004
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Application #:
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10162619
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Filing Dt:
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06/06/2002
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Publication #:
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Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10162633
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Filing Dt:
|
06/06/2002
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Publication #:
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Pub Dt:
|
01/09/2003
| | | | |
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Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING DEFECTIVE MEMORY BLOCK
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/08/2005
|
Application #:
|
10162882
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Filing Dt:
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06/06/2002
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Publication #:
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Pub Dt:
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03/13/2003
| | | | |
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Title:
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GAS ANALYZING METHOD AND GAS ANALYZER FOR SEMICONDUCTOR TREATER
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|
|
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Patent #:
|
|
Issue Dt:
|
03/22/2005
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Application #:
|
10163452
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Filing Dt:
|
06/07/2002
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Publication #:
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Pub Dt:
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07/17/2003
| | | | |
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Title:
|
INSTRUCTION CODE CONVERSION APPARATUS CREATING AN INSTRUCTION CODE INCLUDING A SECOND CODE CONVERTED FROM A FIRST CODE
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|
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Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10163453
|
Filing Dt:
|
06/07/2002
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|
Publication #:
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Pub Dt:
|
06/12/2003
| | | | |
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Title:
|
Semiconductor substrate cleaning apparatus, method of cleaning semiconductor substrate and method of manufacturing semiconductor device
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10163458
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Filing Dt:
|
06/07/2002
|
|
Publication #:
|
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Pub Dt:
|
10/17/2002
| | | | |
|
Title:
|
METHOD FOR FORMATION OF SEMICONDUCTOR DEVICE PATTERN, METHOD FOR DESIGNING PHOTO MASK PATTERN, PHOTO MASK AND PROCESS FOR PHOTO MASK
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10163468
|
Filing Dt:
|
06/07/2002
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|
Publication #:
|
|
Pub Dt:
|
10/17/2002
| | | | |
|
Title:
|
Semiconductor memory device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10163507
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Filing Dt:
|
06/07/2002
|
|
Publication #:
|
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Pub Dt:
|
12/19/2002
| | | | |
|
Title:
|
DMA CONTROLLER HAVING A TRACE BUFFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10163554
|
Filing Dt:
|
06/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/24/2002
| | | | |
|
Title:
|
METHOD FOR FORMATION OF SEMICONDUCTOR DEVICE PATTERN, METHOD FOR DESIGNING PHOTO MASK PATTERN, PHOTO MASK AND PROCESS FOR PHOTO MASK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10163579
|
Filing Dt:
|
06/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND TEST SYSTEM THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10164607
|
Filing Dt:
|
06/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH VOLTAGE DOWN CIRCUIT CHANGING POWER SUPPLY VOLTAGE TO OPERATING VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2006
|
Application #:
|
10166123
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
|
Title:
|
DELAY LOCKED LOOP CIRCUIT AND ITS CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2006
|
Application #:
|
10166198
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
IMAGING DEVICE WITH SUPPRESSED INTER-COLUMN VARIATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10166264
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10166267
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
CLOCK CONTROL CIRCUIT
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10166269
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
Information processing device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2003
|
Application #:
|
10166410
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
PWM CONVERTING CIRCUIT, D/A CONVERTER AND PWM CONVERTING METHOD WITH IMPROVED RESOLUTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10166636
|
Filing Dt:
|
06/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
FILE SYSTEM INCLUDING NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING A PLURALITY OF BANKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
10167077
|
Filing Dt:
|
06/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
MICROCOMPUTER HAVING BUILT-IN PHASE LOCKED LOOP CIRCUIT SYNCHRONIZED WITH EXTERNAL CLOCK AND DETECTING AN INTERRUPTION OF THE EXTERNAL CLOCK BY UTILIZING CONTINUOUS OUTPUTS OF THE PLL CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
10167078
|
Filing Dt:
|
06/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
APPARATUS FOR REDUCING MOTOR DRIVING NOISE AND METHOD FOR GENERATING MOTOR DRIVING NOISE REDUCING SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10167087
|
Filing Dt:
|
06/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
10167460
|
Filing Dt:
|
06/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
MODULATOR
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10167488
|
Filing Dt:
|
06/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
RESISTANCE-TO-DIGITAL CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2005
|
Application #:
|
10167655
|
Filing Dt:
|
06/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH SOURCE LINE HAVING REDUCED RESISTANCE AND MANUFACTURING METHOD THEREFOR
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10170565
|
Filing Dt:
|
06/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
Process failure information management system
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2004
|
Application #:
|
10170580
|
Filing Dt:
|
06/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
THIN FILM MAGNETIC MEMORY DEVICE FOR WRITING DATA OF A PLURALITY OF BITS IN PARALLEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2004
|
Application #:
|
10170588
|
Filing Dt:
|
06/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10171600
|
Filing Dt:
|
06/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
|
Title:
|
Electronic device having multilayer interconnection structure
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10172007
|
Filing Dt:
|
06/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
Crosstalk verifying device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10172908
|
Filing Dt:
|
06/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING PHASE ERROR IMPROVED DLL CIRCUIT MOUNTED THEREON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10173261
|
Filing Dt:
|
06/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2004
|
Application #:
|
10173263
|
Filing Dt:
|
06/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/10/2003
| | | | |
|
Title:
|
CLOCK SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10173266
|
Filing Dt:
|
06/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
|
Title:
|
TEST CIRCUIT CAPABLE OF TESTING EMBEDDED MEMORY WITH RELIABILITY
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10173666
|
Filing Dt:
|
06/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
|
Title:
|
Semiconductor device and method of fabricating same
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2005
|
Application #:
|
10174995
|
Filing Dt:
|
06/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING TWO-TRANSISTOR, ONE-CAPACITOR TYPE MEMORY CELLS OF HIGH DATA HOLDING CHARACTERISTIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
10175001
|
Filing Dt:
|
06/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
METHOD OF DESIGNING SEMICONDUCTOR DEVICE USING POWER SUPPLY BUMP CONNECTIONS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10175445
|
Filing Dt:
|
06/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
|
Title:
|
Semiconductor device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10175784
|
Filing Dt:
|
06/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
METHOD OF REGENERATING SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10175845
|
Filing Dt:
|
06/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
Semiconductor memory device capable of failure analysis with system in operation
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10175846
|
Filing Dt:
|
06/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
THIN FILM MAGNETIC MEMORY DEVICE INCLUDING MEMORY CELLS HAVING A MAGNETIC TUNNEL JUNCTION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10175956
|
Filing Dt:
|
06/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
|
Title:
|
Logical simulation method
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2004
|
Application #:
|
10176053
|
Filing Dt:
|
06/21/2002
|
|
Title:
|
MULTI-VALUED LOGICAL CIRCUIT WITH LESS LATCH-UP
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10176132
|
Filing Dt:
|
06/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
|
Title:
|
ALIGNER HAVING SHARED ROTATION SHAFT
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10176133
|
Filing Dt:
|
06/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2003
| | | | |
|
Title:
|
Motion search apparatus for determining motion vector in accordance with motion vector of macro block neighboring object macro block
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2003
|
Application #:
|
10176633
|
Filing Dt:
|
06/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
HIGH-VOLTAGE DETECTION CIRCUIT FOR A SEMICONDUCTOR MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2004
|
Application #:
|
10176658
|
Filing Dt:
|
06/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
FABRICATION METHOD FOR SAMPLE TO BE ANALYZED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10176679
|
Filing Dt:
|
06/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY CHIP AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10178411
|
Filing Dt:
|
06/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH DUAL PORT MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10178537
|
Filing Dt:
|
06/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY MODULE AND REGISTER BUFFER DEVICE FOR USE IN THE SAME
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10178543
|
Filing Dt:
|
06/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
Computer system provided in a home for inventory management, and inventory management system using home server
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10178558
|
Filing Dt:
|
06/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
Method of manufacturing semiconductor device having insulating film
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10180547
|
Filing Dt:
|
06/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
Secreted and transmembrane polypeptides and nucleic acids encoding the same
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
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10183394
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Filing Dt:
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06/28/2002
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|
Publication #:
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Pub Dt:
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08/14/2003
| | | | |
|
Title:
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APPARATUS FOR EVALUATING LITHOGRAPHY PROCESS MARGIN SIMULATING LAYOUT PATTERN OF SEMICONDUCTOR DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10183408
|
Filing Dt:
|
06/28/2002
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|
Publication #:
|
|
Pub Dt:
|
11/14/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10184881
|
Filing Dt:
|
07/01/2002
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|
Publication #:
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|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
Test apparatus for an oscillation circuit incorporated in IC
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10184898
|
Filing Dt:
|
07/01/2002
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|
Publication #:
|
|
Pub Dt:
|
11/14/2002
| | | | |
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
10184914
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Filing Dt:
|
07/01/2002
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|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
10187622
|
Filing Dt:
|
07/03/2002
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|
Publication #:
|
|
Pub Dt:
|
07/03/2003
| | | | |
|
Title:
|
GAIN CONTROL CIRCUIT FOR CONTROLLING A GAIN IN A VARIABLE GAIN CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10187981
|
Filing Dt:
|
07/03/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR STORAGE DEVICE HAVING A SHORTENED TIME REQUIRED FOR A DATA ERASING OPERATION AND DATA ERASING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10188082
|
Filing Dt:
|
07/03/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2003
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2005
|
Application #:
|
10188103
|
Filing Dt:
|
07/03/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10189527
|
Filing Dt:
|
07/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
Method of Illumination with linearly polarized laser radiation
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
10189575
|
Filing Dt:
|
07/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WTIH PERIPHERAL CIRCUIT PART COMPRISING AT LEAST ONE OF TWO TRANSISTORS HAVING LOWER CONDUCTIVE LAYER SAME PERPENDICULAR STRUCTURE AS A FLOATING GATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
10189577
|
Filing Dt:
|
07/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
CLOCK SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10189586
|
Filing Dt:
|
07/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
|
Title:
|
RESIN MOLD SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10189587
|
Filing Dt:
|
07/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
Semiconductor device having element isolation structure
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10190668
|
Filing Dt:
|
07/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
THIN FILM MAGNETIC MEMORY DEVICE WITH HIGH-ACCURACY DATA READ STRUCTURE HAVING A REDUCED NUMBER OF CIRCUIT ELEMENTS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10190669
|
Filing Dt:
|
07/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE CAPABLE OF MEASURING A PERIOD OF AN INTERNALLY PRODUCED PERIODIC SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
10190715
|
Filing Dt:
|
07/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
SEMICONDUCTOR STORAGE DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10191315
|
Filing Dt:
|
07/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
Microcomputer for accessing a replacing block area preset in a nonvolatile memory in place of a replaced block area accessed in the nonvolatile memory
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10191320
|
Filing Dt:
|
07/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE FOR EVALUATION CAPABLE OF EVALUATING CRYSTAL DEFECT USING IN-LINE TEST BY AVOIDING USING PREFERENTIAL ETCHING PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2004
|
Application #:
|
10191418
|
Filing Dt:
|
07/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING BOOSTER CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10191469
|
Filing Dt:
|
07/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10191472
|
Filing Dt:
|
07/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A DEVICE FORMATION REGION PROTECTED FROM A COUNTERELECTROMOTIVE FORCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10191491
|
Filing Dt:
|
07/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
METHOD FOR FORMING A RESIST PATTERN AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
10191498
|
Filing Dt:
|
07/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE CAPABLE OF APPLYING STRESS VOLTAGE TO BIT LINE PAIR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2004
|
Application #:
|
10192610
|
Filing Dt:
|
07/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING S/D TO S/D CONNECTION AND ISOLATION REGION BETWEEN TWO SEMICONDUCTOR ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2004
|
Application #:
|
10192629
|
Filing Dt:
|
07/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10192657
|
Filing Dt:
|
07/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING OFFSET INSULATION FILM FORMED ON INSULATION FILM, AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
10192675
|
Filing Dt:
|
07/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
|
Title:
|
LAYOUT VERIFICATION METHOD, PROGRAM THEREOF, AND LAYOUT VERIFICATION APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
10192706
|
Filing Dt:
|
07/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING RESISTIVE ELEMENT FORMED OF SEMICONDUCTOR FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10193064
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
DATA/CLOCK RECOVERY CIRCUIT FOR RECOVERING DATA AND CLOCK SIGNAL WITH HIGH ACCURACY
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10193176
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
Semiconductor device having a nitride barrier for preventing formation of structural defects
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10193237
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
SCANNING PROBE MICROSCOPE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10193250
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10193251
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH DELAY CORRECTION FUNCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10193252
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
FLASH MEMORY HAVING ENHANCED YIELD AND HAVING ENHANCED RELIABILITY IN REDUNDANT AND DUMMY CIRCUITS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10193270
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
ROM-data read-protection-cancellation device with improved access authority check
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10193273
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/27/2003
| | | | |
|
Title:
|
VOLTAGE CONTROLLED OSCILLATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2007
|
Application #:
|
10193319
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
MEMORY CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10193322
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
AUTOMATIC PLACEMENT AND ROUTING APPARATUS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10193324
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
Home network system
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2005
|
Application #:
|
10193325
|
Filing Dt:
|
07/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
MICROCOMPUTER AND DEBUGGING SYSTEM
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10194356
|
Filing Dt:
|
07/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
|
Title:
|
Computer memory product for substrate surface treatment applications
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10195053
|
Filing Dt:
|
07/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/15/2004
| | | | |
|
Title:
|
Methods for evaluating oligonucleotide probes of variable length
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10195136
|
Filing Dt:
|
07/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
|
Title:
|
PASSIVATION LAMINATE OF TWO HYDROGEN-CONTAINING SILICON NITRIDE LAYERS FOR COPPER WIRING IN A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10195365
|
Filing Dt:
|
07/16/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
Chemical vapor deposition apparatus
|
|
