|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
10195381
|
Filing Dt:
|
07/16/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING A CAPACITIVE PLATE TO REDUCE SOFT ERRORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2004
|
Application #:
|
10196170
|
Filing Dt:
|
07/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
METHODS OF WRITING/ERASING OF NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
10196181
|
Filing Dt:
|
07/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
METHOD OF FORMING DIELECTRIC FILM AND DIELECTRIC FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
10196951
|
Filing Dt:
|
07/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10197563
|
Filing Dt:
|
07/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/27/2003
| | | | |
|
Title:
|
Semiconductor device manufacturing apparatus
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10197578
|
Filing Dt:
|
07/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/27/2003
| | | | |
|
Title:
|
Semiconductor device allowing control of clock supply to processor on a clock cycle basis
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
10197870
|
Filing Dt:
|
07/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
|
Application #:
|
10198106
|
Filing Dt:
|
07/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE INCLUDING TEST-FACILITATING CIRCUIT USING BUILT-IN SELF TEST CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
10198933
|
Filing Dt:
|
07/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
TESTING APPARATUS INCLUDING TESTING BOARD HAVING WIRINGS CONNECTED TO COMMON POINT AND METHOD OF TESTING SEMICONDUCTOR DEVICE BY COMPOSING SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2004
|
Application #:
|
10199173
|
Filing Dt:
|
07/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10200250
|
Filing Dt:
|
07/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/27/2003
| | | | |
|
Title:
|
Semiconductor device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
10200253
|
Filing Dt:
|
07/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
RENDERING PROCESS APPARATUS CAPABLE OF IMPROVING PROCESSING SPEED OF OVERALL GRAPHIC SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
10200257
|
Filing Dt:
|
07/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH INTERNAL POTENTIAL GENERATING CIRCUIT ALLOWING EXTERNAL TUNING OF INTERNAL POWER SUPPLY POTENTIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10200523
|
Filing Dt:
|
07/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE INCLUDING INSULATED GATE TYPE TRANSISTOR WITH POCKET REGIONS AND INSULATED GATE TYPE CAPACITOR WITH NO REGION OF REVERSE CONDUCTIVITY TYPE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10200773
|
Filing Dt:
|
07/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE THAT CAN SUPPRESS EFFECT OF THRESHOLD VOLTAGE VARIATION OF MEMORY CELL TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2004
|
Application #:
|
10201080
|
Filing Dt:
|
07/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT WITH VOLTAGE DOWN CONVERTER ADAPTABLE FOR BURN-IN TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
10201137
|
Filing Dt:
|
07/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH DETECTION CIRCUIT
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10201201
|
Filing Dt:
|
07/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
Method of fabricating transistor
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10201285
|
Filing Dt:
|
07/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
Semiconductor device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10201921
|
Filing Dt:
|
07/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
SEMICONDUCTOR STORAGE DEVICE HAVING HIGH SOFT-ERROR IMMUNITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
10201992
|
Filing Dt:
|
07/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
CLIP-TYPE LEAD FRAME FOR ELECTRICALLY CONNECTING TWO SUBSTRATES OR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2004
|
Application #:
|
10202042
|
Filing Dt:
|
07/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10202165
|
Filing Dt:
|
07/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
Method of simulation
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
10202790
|
Filing Dt:
|
07/26/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2004
|
Application #:
|
10203882
|
Filing Dt:
|
08/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
WAFER SHAPE EVALUATING METHOD AND DEVICE PRODUCING METHOD, WAFER AND WAFER SELECTING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10205311
|
Filing Dt:
|
07/26/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
|
Title:
|
METHOD FOR TESTING A SEMICONDUCTOR INTEGRATED CIRCUIT WHEN A DIFFERENCE BETWEEN TWO CONSECUTIVE CURRENT EXCEEDS A THRESHOLD VALUE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
10205313
|
Filing Dt:
|
07/26/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
METHOD FOR TESTING A SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10205435
|
Filing Dt:
|
07/26/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE CAPABLE OF RELIABLE POWER-ON RESET
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10206756
|
Filing Dt:
|
07/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
Cache memory control device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
10207025
|
Filing Dt:
|
07/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE COMPRISING SENSE AMPLIFIER AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
10207042
|
Filing Dt:
|
07/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE CAPABLE OF TUNING OF INTERNAL POWER SUPPLY VOLTAGES GENERATED BY A PLURALITY OF INTERNAL POWER GENERATING CIRCUITS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10207157
|
Filing Dt:
|
07/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
Method of manufacturing semiconductor device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
10207173
|
Filing Dt:
|
07/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH ADDRESS PROGRAMMING CIRCUIT
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10207849
|
Filing Dt:
|
07/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
Multilayered memory device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10207900
|
Filing Dt:
|
07/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
THIN-FILM MAGNETIC MEMORY DEVICE WITH MEMORY CELLS HAVING MAGNETIC TUNNEL JUNCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
10208769
|
Filing Dt:
|
08/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
|
Title:
|
E-RAM WITH COBALT SILICIDE LAYER OVER SOURCE/DRAIN OF MEMORY CELL PART AND OVER SOURCE/DRAIN AND GATE WIRING OF LOGIC PART
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2004
|
Application #:
|
10208821
|
Filing Dt:
|
08/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10208837
|
Filing Dt:
|
08/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH A LOW RESISTANCE WIRING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10208845
|
Filing Dt:
|
08/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
METHOD OF FORMING A FILM USING CHEMICAL VAPOR DEPOSITION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10208859
|
Filing Dt:
|
08/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
Fault verification apparatus
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10208983
|
Filing Dt:
|
08/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH STRUCTURE RESTRICTING FLOW OF UNNECESSARY CURRENT THEREIN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10209884
|
Filing Dt:
|
08/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING A PLURALITY OF SIGNAL LINES FOR WRITING AND READING DATA
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10209885
|
Filing Dt:
|
08/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
Method of manufacturing phase shift mask, phase shift mask and apparatus
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
10209901
|
Filing Dt:
|
08/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
REFRESH CONTROL CIRCUITRY FOR REFRESHING STORAGE DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
10209906
|
Filing Dt:
|
08/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2004
|
Application #:
|
10210077
|
Filing Dt:
|
08/02/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
|
Title:
|
SOLID IMAGE PICKUP APPARATUS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10211276
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
Wafer cleaning method
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
10211289
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
10211305
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
DISCONNECTION DETECTING CIRCUIT DETECTING DISCONNECTION BASED ON A CHANGE IN DETECTION SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
10211338
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE OF WHICH BIT LINE WITHSTAND VOLTAGE CAN BE INCREASED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10211339
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10211350
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10211362
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
10211376
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH INTEGRALLY FORMED WELL CONTACT AREAS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2004
|
Application #:
|
10211377
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10211705
|
Filing Dt:
|
08/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
10212063
|
Filing Dt:
|
08/06/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
SEMICONDUCTOR WIRING STRUCTURE HAVING DIVIDED POWER LINES AND GROUND LINES ON THE SAME LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10212249
|
Filing Dt:
|
08/06/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING STEPS OF FORMING BOTH INSULATING FILM AND EPITAXIAL SEMICONDUCTOR ON SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10212252
|
Filing Dt:
|
08/06/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH OFFSET SIDEWALL STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10212274
|
Filing Dt:
|
08/06/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10212701
|
Filing Dt:
|
08/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
Method of manufacturing a semiconductor device having a trench isolation structure
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10212707
|
Filing Dt:
|
08/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING INTERNAL CIRCUIT OPERATING IN SYNCHRONIZATION WITH INTERNAL CLOCK SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10212708
|
Filing Dt:
|
08/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH MULTIPLE LAYER INSULATING FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
10212768
|
Filing Dt:
|
08/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
LOGIC OPTIMIZATION DEVICE FOR AUTOMATICALLY DESIGNING INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
10212789
|
Filing Dt:
|
08/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10212814
|
Filing Dt:
|
08/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
Software license management system
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2004
|
Application #:
|
10212816
|
Filing Dt:
|
08/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING DIVIDED WORD LINE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
10212842
|
Filing Dt:
|
08/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT AND MULTI-CHIP PACKAGE WITH MEANS TO OPTIMIZE INTERNAL DRIVE CAPACITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2005
|
Application #:
|
10214230
|
Filing Dt:
|
08/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
CACHE DEVICE CONTROLLING A STATE OF A CORRESPONDING CACHE MEMORY ACCORDING TO A PREDETERMINED PROTOCOL
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10214231
|
Filing Dt:
|
08/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
|
Title:
|
Trace information generation apparatus for generating branch trace information omitting at least part of branch source information and branch destination information on target processing
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2004
|
Application #:
|
10214360
|
Filing Dt:
|
08/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10214574
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
Semiconductor device
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10214593
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
Semiconductor device having dual-gate structure and method of manufacturing the same
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10214598
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
SYNCHRONOUS SIGNAL TRANSFER AND PROCESSING DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10214600
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE COMPRISING A GATE CONDUCTIVE LAYER WITH A STRESS MITIGATING FILM THEREON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
10214603
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING AN IMPROVED ISOLATION STRUCTURE, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10214726
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
Semiconductor device
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2005
|
Application #:
|
10214734
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
PHOTOMASK VISUAL INSPECTION SYSTEM
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10214761
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
Pattern forming method
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10215722
|
Filing Dt:
|
08/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
Web services container
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10216180
|
Filing Dt:
|
08/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
Capacitance element and boosting circuit using the same
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
10216358
|
Filing Dt:
|
08/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
METHOD OF PROVIDING A CONDUCTIVE MATERIAL IN AN OPENING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
10216363
|
Filing Dt:
|
08/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING SEMICONTOR DEVICE HAVING TRENCH ISOLATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
10216728
|
Filing Dt:
|
08/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING A FILTER WITH ADJUSTABLE CUT-OFF FREQUENCY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2004
|
Application #:
|
10216729
|
Filing Dt:
|
08/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING CONTROL CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
10216730
|
Filing Dt:
|
08/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
10216751
|
Filing Dt:
|
08/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING INTERNAL CIRCUIT SCREENING FUNCTION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10216816
|
Filing Dt:
|
08/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
Resist pattern hardening method
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10216818
|
Filing Dt:
|
08/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE CONTAINING COPPER DIFFUSION PREVENTIVE FILM OF SILICON CARBIDE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2004
|
Application #:
|
10216844
|
Filing Dt:
|
08/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
COMPUTER-IMPLEMENTED METHOD OF PROCESS ANALYSIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2004
|
Application #:
|
10217391
|
Filing Dt:
|
08/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
DATA OUTPUT CIRCUIT WITH REDUCED OUTPUT NOISE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
10218330
|
Filing Dt:
|
08/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2003
| | | | |
|
Title:
|
A SEMICONDUCTOR DEVICE INCLUDING LOW DIELECTRIC CONSTANT INSULATING FILM FORMED ON UPPER AND SIDE SURFACES OF THE GATE ELECTRODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10218444
|
Filing Dt:
|
08/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2004
|
Application #:
|
10218447
|
Filing Dt:
|
08/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE HAVING CHANNEL CUT LAYERS PROVIDED AT DIFFERENT DEPTHS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10218489
|
Filing Dt:
|
08/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
Sales method of photomask design data
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10218517
|
Filing Dt:
|
08/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
SEMICONDUCTOR OUTPUT CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10218523
|
Filing Dt:
|
08/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
PROGRAM CONVERSION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
10218524
|
Filing Dt:
|
08/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH INCREASED CAPACITANCE AND REDUCED PREFORMANCE FLUCTUATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
10219270
|
Filing Dt:
|
08/16/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
THIN FILM MAGNETIC MEMORY DEVICE HAVING COMMUNICATION FUNCTION, AND DISTRIBUTION MANAGEMENT SYSTEM AND MANUFACTURING STEP MANAGEMENT SYSTEM EACH USING THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2004
|
Application #:
|
10219292
|
Filing Dt:
|
08/16/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
DEFECT INSPECTING DEVICE FOR SUBSTRATE TO BE PROCESSED AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
