skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:015257/0286   Pages: 4
Recorded: 04/18/2004
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 7
1
Patent #:
Issue Dt:
05/24/2005
Application #:
10359678
Filing Dt:
02/07/2003
Publication #:
Pub Dt:
07/31/2003
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING MISFETS EACH WITH A GATE ELECTRODE EXTENDED OVER A BOUNDARY REGION BETWEEN AN ACTIVE REGION AND AN ELEMENT ISOLATION TRENCH
2
Patent #:
Issue Dt:
10/03/2006
Application #:
10363065
Filing Dt:
08/13/2003
Publication #:
Pub Dt:
02/12/2004
Title:
Semiconductor device including stress inducing films formed over N-channel and P-channel field effect transistors and a method of manufacturing the same
3
Patent #:
Issue Dt:
03/07/2006
Application #:
10405615
Filing Dt:
04/03/2003
Publication #:
Pub Dt:
10/02/2003
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING DUMMY PATTERNS LOCATED TO REDUCE DISHING
4
Patent #:
NONE
Issue Dt:
Application #:
10455441
Filing Dt:
06/06/2003
Publication #:
Pub Dt:
12/11/2003
Title:
Semiconductor device and method of fabricating the same
5
Patent #:
Issue Dt:
03/13/2007
Application #:
10629733
Filing Dt:
07/30/2003
Publication #:
Pub Dt:
03/04/2004
Title:
SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME, A METHOD OF MANUFACTURING A VERTICAL MISFET AND A VERTICAL MISFET, AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
6
Patent #:
Issue Dt:
06/14/2005
Application #:
10644777
Filing Dt:
08/21/2003
Publication #:
Pub Dt:
01/08/2004
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
7
Patent #:
Issue Dt:
02/21/2006
Application #:
10694085
Filing Dt:
10/28/2003
Publication #:
Pub Dt:
05/13/2004
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Assignor
1
Exec Dt:
03/31/2004
Assignee
1
4-1, MARUNOUNCHI 2-CHOME CHIYODA-KU
TOKYO, JAPAN
Correspondence name and address
ANTONELLI, TERRY, STROUT KRAUS
MELVIN KRAUS
1330 N. SEVENTEENTH ST.
SUITE 1800
ARLINGTON, VA 22209

Search Results as of: 04/27/2024 12:48 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT