Patent Assignment Details
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| Reel/Frame: | 015330/0398 | |
| Pages: | 4 |
| | Recorded: | 05/17/2004 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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09826179
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Filing Dt:
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04/04/2001
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Publication #:
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Pub Dt:
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02/21/2002
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Title:
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DLL CIRCUIT AND METHOD OF GENERATING TIMING SIGNALS
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Assignee
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| 2-1, YAESU 2-CHOME CHUO-KU |
| TOKYO, JAPAN |
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Correspondence name and address
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CHOATE, HALL & STEWART
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PATENT GROUP
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EXCHANGE PLACE
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53 STATE STREET
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BOSTON, MA 02109-2804
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05/09/2024 02:41 AM
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