Total properties:
821
Page
1
of
9
Pages:
1 2 3 4 5 6 7 8 9
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
08997622
|
Filing Dt:
|
12/23/1997
|
|
Title:
|
CIRCUIT AND METHOD FOR INTERLEAVING A DATA STREAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2004
|
Application #:
|
09209460
|
Filing Dt:
|
12/11/1998
|
|
Title:
|
ULTRA WIDE BANDWIDTH SPREAD-SPECTRUM COMMUNICATIONS SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
09308604
|
Filing Dt:
|
11/15/1999
|
|
Title:
|
ARRANGEMENT FOR ENCRYPTION/DECRYPTION OF DATA AND DATA CARRIER INCORPORATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
09364289
|
Filing Dt:
|
07/30/1999
|
|
Title:
|
METHOD AND APPARATUS FOR RADIO COMMUNICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
09398707
|
Filing Dt:
|
09/20/1999
|
|
Title:
|
DISCRETE MULTI-TONE (DMT) SYSTEM AND METHOD THAT COMMUNICATES A DATA PUMP DATA STREAM BETWEEN A GENERAL PURPOSE CPU AND A DSP VIA A BUFFERING SCHEME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
09426670
|
Filing Dt:
|
10/25/1999
|
|
Title:
|
CIRCUIT AND METHOD FOR PROCESSING DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
09438288
|
Filing Dt:
|
11/12/1999
|
|
Title:
|
Chip rate base band receiver processor which receives digital information containing symbol information
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
09441330
|
Filing Dt:
|
11/16/1999
|
|
Title:
|
DIGITALLY CONTROLLED RADIO BACK-END
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
09443443
|
Filing Dt:
|
11/22/1999
|
|
Publication #:
|
|
Pub Dt:
|
12/13/2001
| | | | |
|
Title:
|
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A MECHANICALLY ROBUST PAD INTERFACE.
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09451532
|
Filing Dt:
|
12/01/1999
|
|
Title:
|
METHOD AND APPARATUS FOR CONFIGURING A COMMUNICATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
09481858
|
Filing Dt:
|
01/12/2000
|
|
Title:
|
METHOD AND APPARATUS FOR COHERENT DETECTION IN A TELECOMMUNICATIONS SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
09490132
|
Filing Dt:
|
01/24/2000
|
|
Title:
|
FLEXIBLE INTERRUPT CONTROLLER THAT INCLUDES AN INTERRUPT FORCE REGISTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
09498075
|
Filing Dt:
|
02/04/2000
|
|
Title:
|
MULTI CHANNEL CONTROLLER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2004
|
Application #:
|
09498812
|
Filing Dt:
|
02/07/2000
|
|
Title:
|
REAL-TIME PROCESSOR DEBUG SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09498814
|
Filing Dt:
|
02/07/2000
|
|
Title:
|
DATA PROCESSING SYSTEM HAVING INSTRUCTION FOLDING AND METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
09507910
|
Filing Dt:
|
02/22/2000
|
|
Title:
|
METHOD FOR PROCESSING PROGRAM FILES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
09536520
|
Filing Dt:
|
03/28/2000
|
|
Title:
|
METHOD FOR KEY ESCROW IN A COMMUNICATION SYSTEM AND APPARATUS THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
09543866
|
Filing Dt:
|
04/05/2000
|
|
Title:
|
METHOD AND APPARATUS FOR ECHO CANCELLATION UPDATES IN A MULTICARRIER TRANSCEIVER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
09552118
|
Filing Dt:
|
04/19/2000
|
|
Title:
|
METHOD AND APPARATUS FOR INSTRUCTION FETCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
|
Application #:
|
09553271
|
Filing Dt:
|
04/20/2000
|
|
Title:
|
CROSS COUPLING DELAY CHARACTERIZATION FOR INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
09564530
|
Filing Dt:
|
05/04/2000
|
|
Title:
|
DEVICE AND METHOD FOR PERFORMING A CARRIER RECOVERY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
09567973
|
Filing Dt:
|
05/10/2000
|
|
Title:
|
PERFORMANCE MONITOR SYSTEM AND METHOD SUITABLE FOR USE IN AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
09580854
|
Filing Dt:
|
05/30/2000
|
|
Title:
|
METHODS FOR ANALYZING INTEGRATED CIRCUITS AND APPARATUS THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
09591938
|
Filing Dt:
|
06/12/2000
|
|
Title:
|
METHOD AND APPARATUS FOR INSTRUCTION EXECUTION IN A DATA PROCESSING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
09592349
|
Filing Dt:
|
06/12/2000
|
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND SEMICONDUCTOR COMPONENT THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2005
|
Application #:
|
09592449
|
Filing Dt:
|
06/12/2000
|
|
Title:
|
PROCESSOR HAVING SELECTIVE BRANCH PREDICTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
09594411
|
Filing Dt:
|
06/16/2000
|
|
Title:
|
DATA PROCESSING SYSTEM AND METHOD FOR A SECTOR CACHE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
09610028
|
Filing Dt:
|
07/05/2000
|
|
Title:
|
SELF RESETTING HIGH SPEED REDUNDANCY CIRCUIT AND METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
|
Application #:
|
09614794
|
Filing Dt:
|
07/12/2000
|
|
Title:
|
ELECTRONIC COMPONENT AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
09632890
|
Filing Dt:
|
08/07/2000
|
|
Title:
|
METHOD AND APPARATUS FOR DETECTING AND COMPENSATING DIGITAL LOSSES IN A COMMUNICATIONS NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
09649927
|
Filing Dt:
|
08/29/2000
|
|
Title:
|
IMAGE PROCESSING SYSTEM WITH MULTIPLE PROCESSING UNITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2007
|
Application #:
|
09654253
|
Filing Dt:
|
09/01/2000
|
|
Title:
|
MISMATCH MODELING TOOL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
09658152
|
Filing Dt:
|
09/08/2000
|
|
Title:
|
CONVEYING ELEMENT AND CONVEYOR MEANS FOR CONVEYING WAFER RECEPTACLES, AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2001
|
Application #:
|
09660747
|
Filing Dt:
|
09/13/2000
|
|
Title:
|
Minimizing recovery time
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
09667122
|
Filing Dt:
|
09/21/2000
|
|
Title:
|
PROCESSING SYSTEM HAVING SEQUENTIAL ADDRESS INDICATOR SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
09674864
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
DIGITAL COMMUNICATIONS PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
09680777
|
Filing Dt:
|
10/06/2000
|
|
Title:
|
MICROMACHINED COMPONENT AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2005
|
Application #:
|
09684401
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
ULTRAWIDE BANDWIDTH SYSTEM AND METHOD FOR FAST SYNCHRONIZATION USING SUB-CODE SPINS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2005
|
Application #:
|
09684782
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
ULTRA WIDEBAND COMMUNICATION SYSTEM, METHOD, AND DEVICE WITH LOW NOISE RECEPTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
09685195
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
ULTRAWIDE BANDWIDTH SYSTEM AND METHOD FOR FAST SYNCHRONIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
09685196
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
ULTRAWIDE BANDWIDTH SYSTEM AND METHOD FOR FAST SYNCHRONIZATION USING MULTIPLE DETECTION ARMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
09685197
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
MODE CONTROLLER FOR SIGNAL ACQUISITION AND TRACKING IN AN ULTRA WIDEBAND COMMUNICATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
09685198
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
ANALOG SIGNAL SEPARATOR FOR UWB VERSUS NARROWBAND SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2005
|
Application #:
|
09685199
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
A LOW POWER, HIGH RESOLUTION TIMING GENERATOR FOR ULTRA-WIDE BANDWIDTH COMMUNICATION SYSTEMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
09685200
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
LEAKAGE NULLING RECEIVER CORRELATOR STRUCTURE AND METHOD FOR ULTRA WIDE BANDWIDTH COMMUNICATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
09685202
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
METHOD AND SYSTEM FOR ENABLING DEVICE FUNCTIONS BASED ON DISTANCE INFORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
09685203
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
SYSTEM AND METHOD FOR BASEBAND REMOVAL OF NARROWBAND INTERFERENCE IN ULTRA WIDEBAND SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
09685205
|
Filing Dt:
|
10/10/2000
|
|
Title:
|
SYSTEM AND METHOD FOR GENERATING ULTRA WIDEBAND PULSES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2004
|
Application #:
|
09689028
|
Filing Dt:
|
10/12/2000
|
|
Title:
|
MICROPROCESSOR HAVING A CONTENT ADDRESSABLE MEMORY (CAM) DEVICE AS A FUNCTIONAL UNIT THEREIN AND METHOD OF OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
09706089
|
Filing Dt:
|
11/03/2000
|
|
Title:
|
METHOD AND APPARATUS FOR PIPELINE HAZARD DETECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
09706090
|
Filing Dt:
|
11/03/2000
|
|
Title:
|
METHOD AND APPARATUS FOR GENERATION OF PIPELINE HAZARD TEST SEQUENCES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
09712749
|
Filing Dt:
|
11/14/2000
|
|
Title:
|
LOW PROFILE INTEGRATED MODULE INTERCONNECTS AND METHOD OF FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09715748
|
Filing Dt:
|
11/17/2000
|
|
Title:
|
METHOD OF FORMING A DIODE FOR INTEGRATION WITH A SEMICONDUCTOR DEVICE AND METHOD OF FORMING A TRANSISTOR DEVICE HAVING AN INTEGRATED DIODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
09725821
|
Filing Dt:
|
11/29/2000
|
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
|
Title:
|
A CIRCUIT FOR GENERATING HASH VALUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
09729636
|
Filing Dt:
|
12/04/2000
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2003
| | | | |
|
Title:
|
ASSEMBLY COMPRISING A PLURALITY OF MASK CONTAINERS, MANUFACTURING SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICES, AND METHOD
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09737145
|
Filing Dt:
|
12/14/2000
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
Method and apparatus for modifying a bit field in a memory buffer
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
09746277
|
Filing Dt:
|
12/21/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
CIRCUIT AND METHOD FOR PROCESSING AN AUTOMATIC FREQUENCY CONTROL SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
09746278
|
Filing Dt:
|
12/21/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
DEMODULATOR AND METHOD FOR SECOND HARMONIC CANCELLATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
09746692
|
Filing Dt:
|
12/21/2000
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2001
| | | | |
|
Title:
|
DUAL DIGITAL LOW IF COMPLEX RECEIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
09746978
|
Filing Dt:
|
12/21/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
SINGLE INSTRUCTION FOR MULTIPLE LOOPS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09753808
|
Filing Dt:
|
01/03/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
Structure and method for fabricating III-V nitride devices utilizing the formation of a compliant substrate
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
09758798
|
Filing Dt:
|
01/11/2001
|
|
Title:
|
METHOD AND SYSTEM FOR LINK FABRIC ERROR DETECTION AND MESSAGE FLOW CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
09758856
|
Filing Dt:
|
01/11/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/27/2001
| | | | |
|
Title:
|
MULTIPLE MEMORY COHERENCE GROUPS IN A SINGLE SYSTEM AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
09758864
|
Filing Dt:
|
01/11/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2001
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR MAINTAINING PACKET ORDERING WITH ERROR RECOVERY AMONG MULTIPLE OUTSTANDING PACKETS BETWEEN TWO DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
|
Application #:
|
09758949
|
Filing Dt:
|
01/11/2001
|
|
Title:
|
DIGITAL DATA SYSTEM WITH LINK LEVEL MESSAGE FLOW CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
09764967
|
Filing Dt:
|
01/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
|
Title:
|
METHOD AND CIRCUIT FOR FORMING AN ATM CELL
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09766046
|
Filing Dt:
|
01/19/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
|
Title:
|
Structure and method for fabricating GaN devices utilizing the formation of a compliant substrate
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
09772830
|
Filing Dt:
|
01/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
|
Title:
|
MEMORY ACCESS WITH CONSECUTIVE ADDRESSES CORRESPONDING TO DIFFERENT ROWS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2005
|
Application #:
|
09773806
|
Filing Dt:
|
02/01/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR OPERATING A COMMUNICATION BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
09779886
|
Filing Dt:
|
02/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
DATA PROCESSOR AND METHOD OF OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
09780720
|
Filing Dt:
|
02/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
SCALEABLE ARBITRATION AND PRIORITIZATION OF MULTIPLE INTERRUPTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2005
|
Application #:
|
09781492
|
Filing Dt:
|
02/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
DESIGN ANALYSIS TOOL FOR PATH EXTRACTION AND FALSE PATH IDENTIFICATION AND METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
09788815
|
Filing Dt:
|
02/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
|
Title:
|
DATA PROCESSING SYSTEM WITH ON-CHIP FIFO FOR STORING DEBUG INFORMATION AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
09788816
|
Filing Dt:
|
02/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
|
Title:
|
DATA PROCESSING SYSTEM HAVING AN ON-CHIP BACKGROUND DEBUG SYSTEM AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
|
Application #:
|
09789242
|
Filing Dt:
|
02/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/23/2001
| | | | |
|
Title:
|
APPARATUS AND METHOD FOR PERFORMING SISO DECODING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2005
|
Application #:
|
09790445
|
Filing Dt:
|
02/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
|
Title:
|
FRACTIONAL N SYNTHESIZER WITH REDUCED FRACTIONALIZATION SPURS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2008
|
Application #:
|
09794285
|
Filing Dt:
|
02/27/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
| | | | |
|
Title:
|
APPARATUS FOR RECEIVING AND RECOVERING FREQUENCY SHIFT KEYED SYMBOLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2005
|
Application #:
|
09798390
|
Filing Dt:
|
03/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
|
Title:
|
DATA PROCESSING SYSTEM HAVING REDIRECTING CIRCUITRY AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
09800935
|
Filing Dt:
|
03/07/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
METHOD AND DEVICE FOR CREATING AND USING PRE-INTERNALIZED PROGRAM FILES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
09803750
|
Filing Dt:
|
03/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
DEMODULATOR FOR A RADIO RECEIVER AND METHOD OF OPERATION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09809373
|
Filing Dt:
|
03/15/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
|
Title:
|
Distributed amplifier with transistors in a cascode configuration and negative feedback
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09824388
|
Filing Dt:
|
04/02/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
|
Title:
|
Structure and method for fabricating semiconductor structures and devices utilizing a stable template
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09842734
|
Filing Dt:
|
04/26/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
|
Title:
|
Structure and method for fabricating semiconductor structures and devices utilizing binary metal oxide layers
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2006
|
Application #:
|
09847487
|
Filing Dt:
|
05/02/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/07/2002
| | | | |
|
Title:
|
METHOD FOR PRODUCING TEST PATTERNS FOR TESTING AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
09858126
|
Filing Dt:
|
05/15/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR CONTROLLING CURRENT DEMAND IN AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
09859324
|
Filing Dt:
|
05/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
|
Title:
|
MULTIPLE LEVEL BUILT-IN SELF-TEST CONTROLLER AND MEHOD THEREFOR
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09859326
|
Filing Dt:
|
05/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
|
Title:
|
External control of algorithm execution in a built-in self-test circuit and method therefor
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09861637
|
Filing Dt:
|
05/22/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
|
Title:
|
Optical data converter
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09865428
|
Filing Dt:
|
05/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
Structure and method for fabricating on chip radio frequency circulator/isolator structures and devices
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09865429
|
Filing Dt:
|
05/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
Structure and method for fabricating dielectric resonator
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09865447
|
Filing Dt:
|
05/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
Structure and method for fabricating high Q varactor diodes
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09865448
|
Filing Dt:
|
05/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
Stacked device and method of fabricating same
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
09871063
|
Filing Dt:
|
05/31/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
SPEECH RECOGNITION USING POLYNOMIAL EXPANSION AND HIDDEN MARKOV MODELS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09877792
|
Filing Dt:
|
06/08/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
Method and apparatus for designing and making an integrated circuit
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09880928
|
Filing Dt:
|
06/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
|
Title:
|
Communications system and method therefor
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
09884377
|
Filing Dt:
|
06/18/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR A TRAFFIC SHAPER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2005
|
Application #:
|
09885487
|
Filing Dt:
|
06/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
IMAGE REJECTION MIXER WITH SWITCHABLE HIGH OR LOW SIDE INJECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2004
|
Application #:
|
09885574
|
Filing Dt:
|
06/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
FIRST-IN, FIRST-OUT MEMORY SYSTEM HAVING BOTH SIMULTANEOUS AND ALTERNATING DATA ACCESS AND METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09888278
|
Filing Dt:
|
06/23/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR CONTROLLING BUS ARBITRATION DURING CACHE MEMORY BURST CYCLES
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09901109
|
Filing Dt:
|
07/10/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
|
Title:
|
Structure and method for fabricating semiconductor structures and devices utilizing the formation of a compliant substrate comprising an oxygen-doped compound semiconductor layer
|
|
