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Patent Assignment Details
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Reel/Frame:015360/0718   Pages: 37
Recorded: 05/07/2004
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 821
Page 9 of 9
Pages: 1 2 3 4 5 6 7 8 9
1
Patent #:
7157377
Issue Dt:
01/02/2007
Application #:
10779007
Filing Dt:
02/13/2004
Publication #:
US20050181630
Pub Dt:
08/18/2005
Title:
METHOD OF MAKING A SEMICONDUCTOR DEVICE USING TREATED PHOTORESIST
2
Patent #:
7697898
Issue Dt:
04/13/2010
Application #:
10779217
Filing Dt:
02/13/2004
Publication #:
US20050181741
Pub Dt:
08/18/2005
Title:
METHOD AND APPARATUS FOR PROCESSING A FREQUENCY MODULATED (FM) SIGNAL USING AN ADAPTIVE EQUALIZER
3
Patent #:
7205210
Issue Dt:
04/17/2007
Application #:
10780143
Filing Dt:
02/17/2004
Publication #:
US20050181549
Pub Dt:
08/18/2005
Title:
SEMICONDUCTOR STRUCTURE HAVING STRAINED SEMICONDUCTOR AND METHOD THEREFOR
4
Patent #:
6818362
Issue Dt:
11/16/2004
Application #:
10782566
Filing Dt:
02/19/2004
Title:
PHOTOLITHOGRAPHY RETICLE DESIGN
5
Patent #:
6992377
Issue Dt:
01/31/2006
Application #:
10787288
Filing Dt:
02/26/2004
Publication #:
US20050189643
Pub Dt:
09/01/2005
Title:
SEMICONDUCTOR PACKAGE WITH CROSSING CONDUCTOR ASSEMBLY AND METHOD OF MANUFACTURE
6
Patent #:
6964902
Issue Dt:
11/15/2005
Application #:
10787510
Filing Dt:
02/26/2004
Publication #:
US20050191808
Pub Dt:
09/01/2005
Title:
METHOD FOR REMOVING NANOCLUSTERS FROM SELECTED REGIONS
7
Patent #:
7064396
Issue Dt:
06/20/2006
Application #:
10790420
Filing Dt:
03/01/2004
Publication #:
US20050190421
Pub Dt:
09/01/2005
Title:
INTEGRATED CIRCUIT WITH MULTIPLE SPACER INSULATING REGION WIDTHS
8
Patent #:
7334059
Issue Dt:
02/19/2008
Application #:
10792591
Filing Dt:
03/03/2004
Publication #:
US20050198413
Pub Dt:
09/08/2005
Title:
MULTIPLE BURST PROTOCOL DEVICE CONTROLLER
9
Patent #:
7844048
Issue Dt:
11/30/2010
Application #:
10795700
Filing Dt:
03/08/2004
Publication #:
US20050195967
Pub Dt:
09/08/2005
Title:
SELECTIVE TONE EVENT DETECTOR AND METHOD THEREFOR
10
Patent #:
NONE
Issue Dt:
Application #:
10795847
Filing Dt:
03/08/2004
Publication #:
US20050196961
Pub Dt:
09/08/2005
Title:
Method for forming a semiconductor device having metal silicide
11
Patent #:
7105429
Issue Dt:
09/12/2006
Application #:
10797222
Filing Dt:
03/10/2004
Publication #:
US20050202664
Pub Dt:
09/15/2005
Title:
METHOD OF INHIBITING METAL SILICIDE ENCROACHMENT IN A TRANSISTOR
12
Patent #:
7142401
Issue Dt:
11/28/2006
Application #:
10804450
Filing Dt:
03/19/2004
Publication #:
US20050206359
Pub Dt:
09/22/2005
Title:
DETECTING OVERCURRENTS IN A SWITCHING REGULATOR USING A VOLTAGE DEPENDENT REFERENCE
13
Patent #:
6967611
Issue Dt:
11/22/2005
Application #:
10804453
Filing Dt:
03/19/2004
Publication #:
US20050219097
Pub Dt:
10/06/2005
Title:
OPTIMIZED REFERENCE VOLTAGE GENERATION USING SWITCHED CAPACITOR SCALING FOR DATA CONVERTERS
14
Patent #:
6972571
Issue Dt:
12/06/2005
Application #:
10805954
Filing Dt:
03/22/2004
Publication #:
US20050218899
Pub Dt:
10/06/2005
Title:
LOAD BOARD WITH EMBEDDED RELAY TRACKER
15
Patent #:
7181188
Issue Dt:
02/20/2007
Application #:
10806498
Filing Dt:
03/23/2004
Publication #:
US20050215227
Pub Dt:
09/29/2005
Title:
METHOD AND APPARATUS FOR ENTERING A LOW POWER MODE
16
Patent #:
7266486
Issue Dt:
09/04/2007
Application #:
10806612
Filing Dt:
03/23/2004
Publication #:
US20050216244
Pub Dt:
09/29/2005
Title:
MAGNETORESISTIVE RANDOM ACCESS MEMORY SIMULATION
17
Patent #:
7205178
Issue Dt:
04/17/2007
Application #:
10807527
Filing Dt:
03/24/2004
Publication #:
US20050214980
Pub Dt:
09/29/2005
Title:
LAND GRID ARRAY PACKAGED DEVICE AND METHOD OF FORMING SAME
18
Patent #:
7026204
Issue Dt:
04/11/2006
Application #:
10807624
Filing Dt:
03/24/2004
Publication #:
US20050212064
Pub Dt:
09/29/2005
Title:
TRANSISTOR WITH REDUCED GATE-TO-SOURCE CAPACITANCE AND METHOD THEREFOR
19
Patent #:
7105430
Issue Dt:
09/12/2006
Application #:
10811461
Filing Dt:
03/26/2004
Publication #:
US20050215008
Pub Dt:
09/29/2005
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A NOTCHED CONTROL ELECTRODE AND STRUCTURE THEREOF
20
Patent #:
6875635
Issue Dt:
04/05/2005
Application #:
10811581
Filing Dt:
03/29/2004
Publication #:
US20040178511
Pub Dt:
09/16/2004
Title:
METHOD OF ATTACHING A DIE TO A SUBSTRATE
21
Patent #:
7183825
Issue Dt:
02/27/2007
Application #:
10818861
Filing Dt:
04/06/2004
Publication #:
US20050218952
Pub Dt:
10/06/2005
Title:
STATE RETENTION WITHIN A DATA PROCESSING SYSTEM
Assignor
1
MOTOROLA, INC
Exec Dt:
04/04/2004
Assignee
1
FREESCALE SEMICONDUCTOR, INC.
6501 WILLIAM CANNON DRIVE WEST
AUSTIN, TEXAS 78735
Correspondence name and address
FREESCALE SEMICONDUCTOR, INC.
JENNIFER B. WUAMETT
7700 W. PARMER LANE
MD:TX32/PL02
AUSTIN, TX 78729-8084

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