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Reel/Frame:015451/0488   Pages: 16
Recorded: 12/09/2004
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
07/15/2003
Application #:
10015829
Filing Dt:
12/13/2001
Publication #:
Pub Dt:
07/25/2002
Title:
INTEGRATED MEMORY HAVING A CELL ARRAY AND CHARGE EQUALIZATION DEVICES, AND METHOD FOR THE ACCELERATED WRITING OF A DATUM TO THE INTEGRATED MEMORY
Assignors
1
Exec Dt:
12/22/2001
2
Exec Dt:
10/19/2001
3
Exec Dt:
10/19/2001
4
Exec Dt:
10/22/2001
5
Exec Dt:
12/07/2001
6
Exec Dt:
10/19/2001
7
Exec Dt:
10/23/2001
8
Exec Dt:
10/19/2001
9
Exec Dt:
11/06/2001
10
Exec Dt:
12/10/2001
11
Exec Dt:
10/23/2001
12
Exec Dt:
11/07/2001
13
Exec Dt:
10/24/2001
14
Exec Dt:
10/22/2001
15
Exec Dt:
10/22/2001
Assignee
1
ST.-MARTIN-STRASSE 53
MUENCHEN, GERMANY 81669
Correspondence name and address
LERNER AND GREENBERG
RALPH E. LOCHER
P.O. BOX 2480
HOLLYWOOD, FL 33022

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