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Patent Assignment Details
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Reel/Frame:015603/0951   Pages: 7
Recorded: 01/20/2005
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 5
1
Patent #:
Issue Dt:
06/26/1990
Application #:
07233798
Filing Dt:
08/19/1988
Title:
FAST SETTLING PHASE LOCK LOOP
2
Patent #:
Issue Dt:
10/09/1990
Application #:
07415165
Filing Dt:
09/29/1989
Title:
FEED FORWARD SPREAD SPECTRUM SIGNAL PROCESSOR
3
Patent #:
Issue Dt:
04/21/1992
Application #:
07435648
Filing Dt:
11/13/1989
Title:
SINGLE ANALOG PATH MULTI-DATA RATE MATCHED FILTERED DEMODULATOR
4
Patent #:
Issue Dt:
07/28/1992
Application #:
07556160
Filing Dt:
07/23/1990
Title:
PLURAL FREQUENCY MATRIX MULTIPLEXER
5
Patent #:
Issue Dt:
07/09/1996
Application #:
08135778
Filing Dt:
10/12/1993
Title:
TIME DOMAIN ALGEBRAIC ENCODER/DECODER
Assignor
1
Exec Dt:
09/05/2000
Assignee
1
100 N. RIVERSIDE PLAZA
CHICAGO, ILLINOIS 60606-1596
Correspondence name and address
TERJE GUDMESTAD
15460 LAGUNA CANYON ROAD, 1650-7006
IRVINE, CALIFORNIA 92618

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