Patent Assignment Details
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| Reel/Frame: | 015682/0342 | |
| Pages: | 6 |
| | Recorded: | 08/10/2004 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10915166
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Filing Dt:
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08/10/2004
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Publication #:
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Pub Dt:
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02/16/2006
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Title:
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Interconnection capacitance reduction
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Assignee
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| 1621 BARBER LANE |
| MILPITAS, CALIFORNIA 95035 |
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Correspondence name and address
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LSI LOGIC CORPORATION
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LEGAL DEPARTMENT -IP
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RICK BARNES
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1621 BARBER LANE, MS-D106
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MILPITAS, CA 95035
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