|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/1997
|
Application #:
|
08552156
|
Filing Dt:
|
11/02/1995
|
|
Title:
|
NON-VOLATILE REGISTER AND METHOD FOR ACCESSING DATA THEREIN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/1997
|
Application #:
|
08552180
|
Filing Dt:
|
11/02/1995
|
|
Title:
|
VERTICAL TRANSISTOR STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/1997
|
Application #:
|
08552278
|
Filing Dt:
|
11/02/1995
|
|
Title:
|
RESISTOR STRUCTURE AND INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/1998
|
Application #:
|
08552425
|
Filing Dt:
|
11/03/1995
|
|
Title:
|
AUTOMATED METHOD FOR ADDING ATTRIBUTES INDENTIFIED ON A SCHEMATIC DIAGRAM TO AN INTEGRATED CIRCUIT LAYOUT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/1996
|
Application #:
|
08552430
|
Filing Dt:
|
11/03/1995
|
|
Title:
|
PROCESS FOR PROVIDING INTERCONNECT BUMPS ON A BONDING PAD BY APPLICA- TION OF A SHEET OF CONDUCTIVE DISCS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/1997
|
Application #:
|
08552448
|
Filing Dt:
|
11/03/1995
|
|
Title:
|
METHOD FOR TESTING AND BURNING-IN A SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/1997
|
Application #:
|
08552518
|
Filing Dt:
|
11/02/1995
|
|
Title:
|
METHOD FOR TESTING INTEGRATED DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/1998
|
Application #:
|
08552656
|
Filing Dt:
|
11/03/1995
|
|
Title:
|
FABRICATION METHOD FOR A SEMICONDUCTOR DEVICE ON A SEMICONDUCTOR ON INSULATOR SUBSTRATE USING A TWO STAGE THRESHOLD ADJUST IMPLANT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08552657
|
Filing Dt:
|
11/03/1995
|
|
Title:
|
SYSTEM FOR DATA SYNCHRONIZATION BETWEEN TWO DEVICES USING FOUR TIME DOMAINS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/1997
|
Application #:
|
08552665
|
Filing Dt:
|
11/03/1995
|
|
Title:
|
DMETHOD FOR CLEANING A PROCESS CHAMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/1997
|
Application #:
|
08552709
|
Filing Dt:
|
11/03/1995
|
|
Title:
|
CIRCUIT AND METHOD FOR ISOLATING CIRCUIT BLOCKS FOR REDUCING POWER DISSIPATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/1997
|
Application #:
|
08552710
|
Filing Dt:
|
11/03/1995
|
|
Title:
|
LOW-PROFILE BALL-GRID ARRAY SEMICONDUCTOR PACKAGE AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08553801
|
Filing Dt:
|
10/23/1995
|
|
Title:
|
METHOD OF FORMING AN ISOLATION OXIDE FOR SILICON-ON-INSULATOR TECHNOLOGY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/1997
|
Application #:
|
08553933
|
Filing Dt:
|
11/06/1995
|
|
Title:
|
FERROMAGNETIC GMR MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/1998
|
Application #:
|
08554329
|
Filing Dt:
|
11/02/1995
|
|
Title:
|
METHOD FOR IMPLEMENTING AN ADD-COMPARE-SELECT BUTTERFLY OPERATION IN A DATA PROCESSING SYSTEM AND INSTRUCTION THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08555454
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
TIMER BUS STRUCTURE FOR AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/1998
|
Application #:
|
08555455
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
PERFORMING FLEXIBLE LOGICAL OPERATIONS WITH TIMER CHANNEL OUTPUTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/1997
|
Application #:
|
08555456
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
INTEGRATED CIRCUIT INPUT/OUTPUT PROCESSOR HAVING IMPROVED TIMER CAPABILITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/1997
|
Application #:
|
08555961
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
PIN AND STATUS BUS STRUCTURE FOR AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/1998
|
Application #:
|
08555963
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
DATA TRANSFER BETWEEN INTEGRATED CIRCUIT TIMER CHANNELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08555964
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
INTEGRATED CIRCUIT TIMER SYSTEM HAVING A GLOBAL BUS FOR TRANSFERRING INFORMATION BETWEEN LOCAL BUSES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1998
|
Application #:
|
08555965
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
TIMEBASE SYNCHRONIZATION IN SEPARATE INTEGRATED CIRCUITS OR SEPARATE MODULES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/1997
|
Application #:
|
08556474
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
FLEXIBLE CONFIGURATION OF TIMEBASES IN A TIMER SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/1998
|
Application #:
|
08556477
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
METHOD OF FABRICATING SEMICONDUCTOR DEVICES WITH A PASSIVATED SURFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08556686
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
HETEROJUNCTION INTERBAND TUNNEL DIODES WITH IMPROVED P/V CURRENT RATIOS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/1997
|
Application #:
|
08556688
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
METHOD OF DEFINING A LINE WIDTH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/1998
|
Application #:
|
08556782
|
Filing Dt:
|
11/02/1995
|
|
Title:
|
METHOD FOR MAKING A MOISTURE RESISTANT SEMICONDUCTOR DEVICE HAVING AN ORGANIC SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/1998
|
Application #:
|
08556891
|
Filing Dt:
|
11/02/1995
|
|
Title:
|
THIN FILM SILICON ON INSULATOR SEMICONDUCTOR INTEGRATED CIRCUIT WITH ELECTROSTATIC DAMAGE PROTECTION AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08557401
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
MULTI-PURPOSE PERIPHERAL BUS DRIVER APPARATUS AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/1998
|
Application #:
|
08557405
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
METHOD OF FABRICATING SEMICONDUCTOR DEVICES WITH A PASSIVATED SURFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/1996
|
Application #:
|
08557667
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
LEAD FRAME ASSEMBLY FOR SURFACE MOUNT INTEGRATED CIRCUIT POWER PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08558071
|
Filing Dt:
|
11/13/1995
|
|
Title:
|
METHOD AND APPARATUS FOR EFFICIENTLY PROCESSING MULTIPLE CACHE MISSES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08558451
|
Filing Dt:
|
11/16/1995
|
|
Title:
|
METHODS OF SIMULATING AN ELECTRONIC CIRCUIT DESIGN AND FORMING AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08558518
|
Filing Dt:
|
11/16/1995
|
|
Title:
|
METHOD OF FORMING AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08559669
|
Filing Dt:
|
11/20/1995
|
|
Title:
|
APPARATUS AND METHOD FOR DYNAMICALLY MIXING SLURRY FOR CHEMICAL MECHANICAL POLISHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/1997
|
Application #:
|
08560064
|
Filing Dt:
|
11/17/1995
|
|
Title:
|
METHOD AND APPARATUS FOR GENERATING DECOUPLED FILTER PARAMETERS AND IMPLEMENTING A BAND DECOUPLED FILTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/1998
|
Application #:
|
08560155
|
Filing Dt:
|
11/20/1995
|
|
Title:
|
CIRCUIT AND METHOD FOR RECONSTRUCTING A PHASE CURRENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/1997
|
Application #:
|
08560505
|
Filing Dt:
|
11/17/1995
|
|
Title:
|
PLANAR ENCAPSULATION PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08560600
|
Filing Dt:
|
11/20/1995
|
|
Title:
|
APPARATUS FOR PROVIDING SURFACE IMAGES AND METHOD FOR MAKING THE APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/1997
|
Application #:
|
08560876
|
Filing Dt:
|
11/20/1995
|
|
Title:
|
LOW VOLTAGE REFERENCE CIRCUIT AND METHOD OF OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/1998
|
Application #:
|
08560940
|
Filing Dt:
|
11/20/1995
|
|
Title:
|
METHOD AND APPARATUS FOR PROVIDING BUS PROTOCOL SIMULATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/1997
|
Application #:
|
08562440
|
Filing Dt:
|
11/24/1995
|
|
Title:
|
MULTI-STEP PLANARIZATION PROCESS USING POLISHING AT TWO DIFFERENT PAD PRESSURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08562482
|
Filing Dt:
|
11/24/1995
|
|
Title:
|
MAGNETIC MEMORY AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08562861
|
Filing Dt:
|
11/27/1995
|
|
Title:
|
METHOD AND ASSEMBLY FOR PROVIDING IMPROVED UNDERCHIP ENCAPSULATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08563432
|
Filing Dt:
|
11/24/1995
|
|
Title:
|
METHOD OF MAKING A SENSOR FOR DETERMINING A RATIO OF MATERIALS IN A MIXTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/1997
|
Application #:
|
08563875
|
Filing Dt:
|
11/28/1995
|
|
Title:
|
THERMAL PROCESSING APPARATUS AND PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/1997
|
Application #:
|
08563885
|
Filing Dt:
|
11/21/1995
|
|
Title:
|
NON-VOLATILE MEMORY HAVING A CELL APPLYING TO MULTI-BIT DATA BY MULTI- LAYERED FLOATING GATE ARCHITECTURE AND PROGRAMMING METHOD FOR THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08565141
|
Filing Dt:
|
11/30/1995
|
|
Title:
|
PROCESS FOR TESTING A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08565285
|
Filing Dt:
|
11/30/1995
|
|
Title:
|
METHOD FOR FORMING A MULTIPLE-SENSOR SEMICONDUCTOR CHIP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
08565735
|
Filing Dt:
|
11/30/1995
|
|
Title:
|
SEMICONDUCTOR HEATER AND METHOD FOR MAKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08566320
|
Filing Dt:
|
12/01/1995
|
|
Title:
|
METHOD OF FORMING A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/1997
|
Application #:
|
08566385
|
Filing Dt:
|
12/11/1995
|
|
Title:
|
METHODS OF FABRICATION OF SUBMICRON FEATURES IN SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/1997
|
Application #:
|
08566386
|
Filing Dt:
|
12/01/1995
|
|
Title:
|
HIGH FREQUENCY SEMICONDUCTOR TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/1997
|
Application #:
|
08566418
|
Filing Dt:
|
11/30/1995
|
|
Title:
|
SYNCHRONIZATION OF TRANSPARENT TDM SUPERCHANNELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/1998
|
Application #:
|
08566443
|
Filing Dt:
|
11/30/1995
|
|
Title:
|
TRANSMISSION LOAD CONTROL FOR MULTICHANNEL HDLC TDM LINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/1997
|
Application #:
|
08566444
|
Filing Dt:
|
11/30/1995
|
|
Title:
|
MULTICHANNEL HDLC FRAMING/DEFRAMING MACHINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08566639
|
Filing Dt:
|
12/04/1995
|
|
Title:
|
MULTI-RATE DIGITAL FILTER APPARATUS AND METHOD FOR SIGMA-DELTA CONVERSION PROCESSES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/1998
|
Application #:
|
08566754
|
Filing Dt:
|
12/04/1995
|
|
Title:
|
PROCESS FOR UNDERFILLING A FLIP-CHIP SEMICONDUCTOR DEVICE AND A DEVICE MADE THEREBY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08566812
|
Filing Dt:
|
12/04/1995
|
|
Title:
|
A METHOD FOR CREATING A HIGH SPEED SCAN-INTEGRATED SET OF FLIP-FLOP ELEMENTS IN AN INTEGRATED CIRCUIT TO ENABLE FASTER SCAN-BASED TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/1998
|
Application #:
|
08566813
|
Filing Dt:
|
12/04/1995
|
|
Title:
|
SCANNABLE STORAGE CELL AND METHOD OF OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08567012
|
Filing Dt:
|
12/04/1995
|
|
Title:
|
VACUUM PICKUP TOOL FOR PLACING BALLS IN A CUSTOMIZED PATTERN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08567591
|
Filing Dt:
|
12/05/1995
|
|
Title:
|
PIPELINED PROCESSOR OPERATING IN DIFFERENT POWER MODE BASED ON BRANCH PREDICTION STATE OF BRANCH HISTORY BIT ENCODED AS TAKEN WEAKLY NOT TAKEN AND STRONGLY NOT TAKEN STATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2001
|
Application #:
|
08568718
|
Filing Dt:
|
12/07/1995
|
|
Title:
|
SEQUENCING SCHEME FOR REDUCING LOW FREQUENCY TONE GENERATION IN AN ANALOGUE OUTPUT SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/1998
|
Application #:
|
08569038
|
Filing Dt:
|
12/07/1995
|
|
Title:
|
TWO-STAGE OPERATIONAL AMPLIFIER CIRCUIT WITH WIDE OUTPUT VOLTAGE SWINGS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/1998
|
Application #:
|
08570169
|
Filing Dt:
|
12/07/1995
|
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08570453
|
Filing Dt:
|
12/11/1995
|
|
Title:
|
AN INSTRUCTION SET FOR EVALUATING FUZZY LOGIC RULES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/1997
|
Application #:
|
08570454
|
Filing Dt:
|
12/11/1995
|
|
Title:
|
CIRCUIT AND METHOD FOR EVALUATING FUZZY LOGIC RULES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/1996
|
Application #:
|
08571632
|
Filing Dt:
|
12/13/1995
|
|
Title:
|
A SELF-ALIGNED FET HAVING ETCHED OHMIC CONTACTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/1997
|
Application #:
|
08572318
|
Filing Dt:
|
12/14/1995
|
|
Title:
|
SWITCHED CAPACITOR VOLTAGE ERROR COMPENSATING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/1997
|
Application #:
|
08573094
|
Filing Dt:
|
12/15/1995
|
|
Title:
|
PROTECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/1996
|
Application #:
|
08573095
|
Filing Dt:
|
12/15/1995
|
|
Title:
|
VOLTAGE CONTROLLED OSCILLATOR CIRCUIT AND AUTOMATIC FINE TUNING CIRCUIT FOR TV
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08573171
|
Filing Dt:
|
12/15/1995
|
|
Title:
|
PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08575944
|
Filing Dt:
|
12/20/1995
|
|
Title:
|
A SENSOR DEVICE HAVING A PATHWAY AND A SEALED CAVITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08576282
|
Filing Dt:
|
12/21/1995
|
|
Title:
|
METHOD OF ETCHING A TRENCH INTO A SEMICONDUCTOR SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/1997
|
Application #:
|
08578134
|
Filing Dt:
|
12/26/1995
|
|
Title:
|
METHOD FOR PACKAGING SEMICONDUCTOR COMPONENTS FOR SHIPMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08578255
|
Filing Dt:
|
12/26/1995
|
|
Title:
|
INTERCONNECT SYSTEM AND METHOD OF FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/1997
|
Application #:
|
08578763
|
Filing Dt:
|
12/26/1995
|
|
Title:
|
METHOD FOR COMMUNICATING BETWEEN A MICROPROCESSOR AND AN INTERFACE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/1998
|
Application #:
|
08581695
|
Filing Dt:
|
12/29/1995
|
|
Title:
|
ASSEMBLY HAVING A FRAME EMBEDDED IN A POLYMERIC ENCAPSULANT AND METHOD FOR FORMING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/1998
|
Application #:
|
08581697
|
Filing Dt:
|
12/29/1995
|
|
Title:
|
TOOL FOR DETECTING MISSING BALLS USING A PHOTODETECTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08581977
|
Filing Dt:
|
01/02/1996
|
|
Title:
|
SENSOR HAVING AN OFFSET VOLTAGE AND METHOD OF OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/1997
|
Application #:
|
08582841
|
Filing Dt:
|
01/02/1996
|
|
Title:
|
CIRCUIT AND METHOD OF ENCODING AND DECODING DIGITAL DATA TRANSMITTED ALONG OPTICAL FIBERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/1998
|
Application #:
|
08583141
|
Filing Dt:
|
12/28/1995
|
|
Title:
|
LNS-BASED COMPUTER PROCESSOR AND METHOD OF USE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08583259
|
Filing Dt:
|
01/05/1996
|
|
Title:
|
DATA PROCESSING SYSTEM HAVING A REGISTER CONTROLLABLE SPEED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/1998
|
Application #:
|
08583329
|
Filing Dt:
|
01/05/1996
|
|
Title:
|
MASKING METHODS DURING SEMICONDUCTOR DEVICE FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/1997
|
Application #:
|
08583835
|
Filing Dt:
|
01/11/1996
|
|
Title:
|
ELECTRONIC COMPONENT AND METHOD OF PACKAGING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/1997
|
Application #:
|
08585137
|
Filing Dt:
|
01/11/1996
|
|
Title:
|
SEMICONDUCTOR-ON-INSULATOR DEVICE HAVING A LATERALLY-GRADED CHANNEL REGION AND METHOD OF MAKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/1996
|
Application #:
|
08585975
|
Filing Dt:
|
01/16/1996
|
|
Title:
|
VERTICALLY ORIENTED DRAM STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/1997
|
Application #:
|
08585992
|
Filing Dt:
|
01/16/1996
|
|
Title:
|
POWER MOS TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/1997
|
Application #:
|
08586356
|
Filing Dt:
|
01/16/1996
|
|
Title:
|
SCAN REGISTER WITH DECOUPLED SCAN ROUTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/1997
|
Application #:
|
08587045
|
Filing Dt:
|
01/16/1996
|
|
Title:
|
III-V SEMICONDUCTOR GATE STRUCTURE AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/1997
|
Application #:
|
08587434
|
Filing Dt:
|
01/17/1996
|
|
Title:
|
METHOD FOR FABRICATING AN ELEVATED GATE FIELD EFFECT TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08588183
|
Filing Dt:
|
01/18/1996
|
|
Title:
|
METHOD AND SYSTEM FOR DETECTING BYPASS ERROR CONDITIONS IN A LOAD/STORE UNIT OF A SUPERSCALAR PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08588470
|
Filing Dt:
|
01/18/1996
|
|
Title:
|
LED DISPLAY PACKAGING WITH SUBSTRATE REMOVAL AND METHOD OF FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08589240
|
Filing Dt:
|
01/22/1996
|
|
Title:
|
METHOD FOR GENERATING AN OPTIMIZED INTEGRATED CIRCUIT CELL LIBRARY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08589693
|
Filing Dt:
|
01/22/1996
|
|
Title:
|
METHOD OF FABRICATION OF METALLIZATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08589699
|
Filing Dt:
|
01/22/1996
|
|
Title:
|
DATA PROCESSING SYSTEM HAVING PROGRAMMABLE EXTERNAL TERMINALS SUCH THAT THE EXTERNAL TERMINALS ARE SELECTIVELY SUBJECTED TO BUS ARBITRATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2002
|
Application #:
|
08590042
|
Filing Dt:
|
02/05/1996
|
|
Title:
|
METHOD FOR COATING AN INTEGRATED CIRCUIT SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/1997
|
Application #:
|
08591191
|
Filing Dt:
|
12/28/1995
|
|
Title:
|
APPARATUS FOR COMPARING THE WEIGHT OF A BINARY WORD TO A NUMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08591291
|
Filing Dt:
|
01/25/1996
|
|
Title:
|
METHOD AND SYSTEM FOR MINIMIZING THE NUMBER OF CYCLES REQUIRED TO EXECUTE SEMANTIC ROUTINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08591875
|
Filing Dt:
|
01/25/1996
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A MOVABLE GATE
|
|
