Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 015709/0391 | |
| Pages: | 2 |
| | Recorded: | 08/18/2004 | | |
| Attorney Dkt #: | 040397/3120P |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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03/30/2010
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Application #:
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10920975
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Filing Dt:
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08/18/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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METHOD AND SYSTEM FOR REDUCING PIN COUNT IN AN INTEGRATED CIRCUIT WHEN INTERFACING TO A MEMORY
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Assignee
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| 1621 BARBER LANE |
| MILPITAS, CALIFORNIA 95035 |
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Correspondence name and address
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LSI LOGIC CORPORATION
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SANDEEP JAGGI
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IP LAW DEPARTMENT
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1621 BARBER LANE, M/S D-106
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MILPITAS, CA 95035
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