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Patent Assignment Details
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Reel/Frame:015890/0174   Pages: 2
Recorded: 10/14/2004
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
09/05/2006
Application #:
10324615
Filing Dt:
12/18/2002
Title:
DC BALANCED ERROR CORRECTION CODING
Assignor
1
Exec Dt:
12/18/2002
Assignee
1
6290 SEQUENCE DRIVE
SAN DIEGO, CALIFORNIA 92121
Correspondence name and address
SILICON VALLEY PATENT GROUP LLP
OMKAR K. SURYADEVARA
2350 MISSION COLLEGE BOULEVARD,
SUITE 360
SANTA CLARA, CA 95054

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