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Patent Assignment Details
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Reel/Frame:015991/0893   Pages: 21
Recorded: 11/22/2004
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 18
1
Patent #:
Issue Dt:
03/05/2002
Application #:
08805831
Filing Dt:
02/26/1997
Title:
HIGH-SPEED MODEM SYNCHRONIZED TO A REMOTE CODEC
2
Patent #:
Issue Dt:
12/18/2001
Application #:
08903588
Filing Dt:
07/31/1997
Title:
MULTIPLE LINE FRAMER ENGINE
3
Patent #:
Issue Dt:
07/17/2001
Application #:
08927425
Filing Dt:
09/11/1997
Title:
INTERRUPT MECHANISM USING TDM SERIAL INTERFACE
4
Patent #:
Issue Dt:
07/17/2001
Application #:
08947538
Filing Dt:
10/11/1997
Title:
SIMPLIFIED DATA LINK PROTOCOL PROCESSOR
5
Patent #:
Issue Dt:
10/02/2001
Application #:
09143037
Filing Dt:
08/28/1998
Title:
PROCESS FOR SEMICONDUCTOR DEVICE FABRICATION HAVING COPPER INTERCONNECTS
6
Patent #:
Issue Dt:
11/06/2001
Application #:
09188194
Filing Dt:
11/09/1998
Title:
DIGITAL PHASE-LOCKED LOOP WITH PULSE CONTROLLED CHARGE PUMP
7
Patent #:
Issue Dt:
07/10/2001
Application #:
09213102
Filing Dt:
12/17/1998
Title:
FOREGROUND AND BACKGROUND CONTEXT CONTROLLER SETTING PROCESSOR TO POWER SAVING MODE WHEN ALL CONTEXTS ARE INACTIVE
8
Patent #:
Issue Dt:
06/05/2001
Application #:
09215067
Filing Dt:
12/17/1998
Title:
CONTEXT CONTROLLER HAVING STATUS-BASED BACKGROUND FUNCTIONAL TASK RESOURCE ALLOCATION CAPABILITY AND PROCESSOR EMPLOYING THE SAME
9
Patent #:
Issue Dt:
07/03/2001
Application #:
09338143
Filing Dt:
06/22/1999
Title:
INTEGRATED CIRCUIT HAVING A MICROMAGNETIC DEVICE INCLUDING A FERROMAGNETIC CORE AND METHOD OF MANUFACTURE THEREFOR
10
Patent #:
Issue Dt:
06/03/2003
Application #:
09343828
Filing Dt:
06/30/1999
Title:
INOPERABLE NETWORK DEVICE
11
Patent #:
Issue Dt:
06/18/2002
Application #:
09397459
Filing Dt:
09/16/1999
Title:
SEMICONDUCTOR DEVICE HAVING REDUCED LINE WIDTH VARIATIONS BETWEEN TIGHTLY SPACED AND ISOLATED FEATURES
12
Patent #:
Issue Dt:
05/22/2001
Application #:
09433177
Filing Dt:
11/03/1999
Title:
IMPEDANCE PSEUDO-MATCHED WRITE DRIVER
13
Patent #:
Issue Dt:
08/07/2001
Application #:
09498543
Filing Dt:
02/04/2000
Title:
Temperature insensitive capacitor load memory cell
14
Patent #:
Issue Dt:
09/04/2001
Application #:
09534145
Filing Dt:
03/23/2000
Title:
Battery charger with improved overcharge protection mechanism and method of operation thereof
15
Patent #:
Issue Dt:
09/04/2001
Application #:
09571912
Filing Dt:
05/16/2000
Title:
Power-up circuit for analog circuits
16
Patent #:
Issue Dt:
03/25/2003
Application #:
09579216
Filing Dt:
05/26/2000
Title:
METHODS AND APPARATUS FOR DECODING OF GENERAL CODES ON PROBABILITY DEPENDENCY GRAPHS
17
Patent #:
Issue Dt:
09/04/2001
Application #:
09630494
Filing Dt:
08/02/2000
Title:
IMPEDANCE-MATCHED, VOLTAGE-MODE H-BRIDGE WRITE DRIVERS
18
Patent #:
Issue Dt:
04/08/2003
Application #:
09689030
Filing Dt:
10/12/2000
Title:
METHOD OF FORMING A HIGH QUALITY GATE OXIDE LAYER HAVING A UNIFORM THICKNESS
Assignor
1
Exec Dt:
01/30/2001
Assignee
1
1110 AMERICAN PARKWAY NE
ALLENTOWN, PENNSYLVANIA 18109
Correspondence name and address
DOCKET ADMINISTRATOR
AGERE SYSTEMS INC.
ROOM 4U-533C
FOUR CONNELL DRIVE
BERKELEY HEIGHTS, NJ 07922-2747

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