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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:016101/0098   Pages: 5
Recorded: 06/07/2005
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 11
1
Patent #:
Issue Dt:
11/07/2006
Application #:
10661295
Filing Dt:
09/12/2003
Publication #:
Pub Dt:
03/17/2005
Title:
AUTOMATED LAYOUT TRANSFORMATION SYSTEM AND METHOD
2
Patent #:
Issue Dt:
07/04/2006
Application #:
10716381
Filing Dt:
11/17/2003
Publication #:
Pub Dt:
08/05/2004
Title:
DUAL-PURPOSE SHIFT REGISTER
3
Patent #:
Issue Dt:
10/03/2006
Application #:
10974564
Filing Dt:
10/27/2004
Publication #:
Pub Dt:
04/27/2006
Title:
VARIABLE DELAY LINE USING TWO BLENDER DELAYS
4
Patent #:
Issue Dt:
05/06/2014
Application #:
10996667
Filing Dt:
11/24/2004
Publication #:
Pub Dt:
05/25/2006
Title:
PRE-EMPTION MECHANISM FOR PACKET TRANSPORT
5
Patent #:
Issue Dt:
05/18/2010
Application #:
10998471
Filing Dt:
11/29/2004
Publication #:
Pub Dt:
06/01/2006
Title:
DESIGNATED MOSFET AND DRIVER DESIGN TO ACHIEVE LOWEST PARASITICS IN DISCRETE CIRCUITS
6
Patent #:
NONE
Issue Dt:
Application #:
10999596
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
06/01/2006
Title:
Variable pipeline circuit
7
Patent #:
Issue Dt:
03/16/2010
Application #:
11093554
Filing Dt:
03/30/2005
Publication #:
Pub Dt:
10/12/2006
Title:
CLOCK DATA RECOVERY CIRCUIT WITH CIRCUIT LOOP DISABLEMENT
8
Patent #:
NONE
Issue Dt:
Application #:
11112851
Filing Dt:
04/22/2005
Publication #:
Pub Dt:
10/26/2006
Title:
Generation of MRAM programming currents using external capacitors
9
Patent #:
Issue Dt:
04/03/2012
Application #:
11126424
Filing Dt:
05/11/2005
Publication #:
Pub Dt:
05/11/2006
Title:
METHOD OF FABRICATING SEMICONDUCTOR CLEANERS
10
Patent #:
Issue Dt:
10/27/2009
Application #:
11126684
Filing Dt:
05/11/2005
Publication #:
Pub Dt:
11/16/2006
Title:
TECHNIQUE TO READ SPECIAL MODE REGISTER
11
Patent #:
Issue Dt:
07/05/2011
Application #:
11133491
Filing Dt:
05/20/2005
Publication #:
Pub Dt:
11/23/2006
Title:
LOW POWER PHASE CHANGE MEMORY CELL WITH LARGE READ SIGNAL
Assignor
1
Exec Dt:
06/07/2005
Assignee
1
ST.-MARTIN-STR. 53
MUNICH, GERMANY 81669
Correspondence name and address
HEATHER ROWLAND
3000 CENTREGREEN WAY
CARY, NC 27513

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