Total properties:
11
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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10661295
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Filing Dt:
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09/12/2003
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Publication #:
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Pub Dt:
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03/17/2005
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Title:
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AUTOMATED LAYOUT TRANSFORMATION SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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10716381
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Filing Dt:
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11/17/2003
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Publication #:
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Pub Dt:
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08/05/2004
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Title:
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DUAL-PURPOSE SHIFT REGISTER
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10974564
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Filing Dt:
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10/27/2004
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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VARIABLE DELAY LINE USING TWO BLENDER DELAYS
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Patent #:
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Issue Dt:
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05/06/2014
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Application #:
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10996667
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Filing Dt:
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11/24/2004
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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PRE-EMPTION MECHANISM FOR PACKET TRANSPORT
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Patent #:
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Issue Dt:
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05/18/2010
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Application #:
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10998471
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Filing Dt:
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11/29/2004
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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DESIGNATED MOSFET AND DRIVER DESIGN TO ACHIEVE LOWEST PARASITICS IN DISCRETE CIRCUITS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10999596
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Filing Dt:
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11/30/2004
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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Variable pipeline circuit
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Patent #:
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Issue Dt:
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03/16/2010
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Application #:
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11093554
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Filing Dt:
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03/30/2005
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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CLOCK DATA RECOVERY CIRCUIT WITH CIRCUIT LOOP DISABLEMENT
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11112851
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Filing Dt:
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04/22/2005
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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Generation of MRAM programming currents using external capacitors
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Patent #:
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Issue Dt:
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04/03/2012
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Application #:
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11126424
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Filing Dt:
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05/11/2005
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Publication #:
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Pub Dt:
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05/11/2006
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Title:
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METHOD OF FABRICATING SEMICONDUCTOR CLEANERS
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Patent #:
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Issue Dt:
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10/27/2009
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Application #:
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11126684
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Filing Dt:
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05/11/2005
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Publication #:
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Pub Dt:
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11/16/2006
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Title:
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TECHNIQUE TO READ SPECIAL MODE REGISTER
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Patent #:
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Issue Dt:
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07/05/2011
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Application #:
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11133491
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Filing Dt:
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05/20/2005
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Publication #:
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Pub Dt:
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11/23/2006
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Title:
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LOW POWER PHASE CHANGE MEMORY CELL WITH LARGE READ SIGNAL
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